Commit Graph

151022 Commits

Author SHA1 Message Date
Mike Blumenkrantz 3ef093f697 zink: ci updates
cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15274>
2022-03-08 21:30:29 +00:00
Mike Blumenkrantz 5fae35fb17 zink: fix 64bit float shader ops
this was being set from back before zink actually supported 64bit
natively and only 32bit was functional, but it breaks 64bit support

cc: mesa-stable

fixes (lavapipe):
KHR-GL46.gpu_shader_fp64.builtin.mod_dvec2
KHR-GL46.gpu_shader_fp64.builtin.mod_dvec3
KHR-GL46.gpu_shader_fp64.builtin.mod_dvec4

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15274>
2022-03-08 21:30:29 +00:00
Mike Blumenkrantz 9579df6a7f zink: run nir_lower_phis_to_scalar in optimization loop
fixes (lavapipe):
dEQP-GLES3.functional.shaders.switch.switch_in_do_while_loop_dynamic*

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15274>
2022-03-08 21:30:29 +00:00
Samuel Pitoiset 342e6f8332 radv,aco,llvm: lower post shuffle vertex in NIR
fossils-db (Sienna Cichlid):
Totals from 774 (0.57% of 134913) affected shaders:
VGPRs: 26496 -> 26312 (-0.69%)
CodeSize: 1825936 -> 1828812 (+0.16%); split: -0.04%, +0.20%
MaxWaves: 22046 -> 22062 (+0.07%)
Instrs: 347634 -> 347975 (+0.10%); split: -0.05%, +0.15%
Latency: 1363949 -> 1356426 (-0.55%); split: -0.59%, +0.04%
InvThroughput: 221529 -> 221380 (-0.07%); split: -0.10%, +0.04%
VClause: 5682 -> 5676 (-0.11%); split: -1.46%, +1.36%
SClause: 7485 -> 7411 (-0.99%); split: -1.48%, +0.49%
Copies: 30481 -> 30420 (-0.20%); split: -0.51%, +0.31%
PreVGPRs: 19717 -> 19656 (-0.31%)

fossil-db (Polaris10):
Totals from 896 (0.66% of 135960) affected shaders:
SGPRs: 49824 -> 49648 (-0.35%); split: -0.39%, +0.03%
VGPRs: 31040 -> 29948 (-3.52%); split: -3.62%, +0.10%
CodeSize: 875960 -> 875920 (-0.00%); split: -0.06%, +0.05%
MaxWaves: 6380 -> 6429 (+0.77%)
Instrs: 171522 -> 171482 (-0.02%); split: -0.07%, +0.05%
Latency: 1356082 -> 1334386 (-1.60%); split: -1.61%, +0.01%
InvThroughput: 553389 -> 552957 (-0.08%); split: -0.08%, +0.00%
VClause: 4317 -> 4244 (-1.69%); split: -2.41%, +0.72%
SClause: 6157 -> 6139 (-0.29%); split: -0.45%, +0.16%
Copies: 9340 -> 9235 (-1.12%); split: -1.24%, +0.12%
PreVGPRs: 22366 -> 22116 (-1.12%)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15113>
2022-03-08 19:18:01 +00:00
Timur Kristóf 4b99b528f5 nir: Introduce workgroup_index and ability to lower workgroup_id to it.
The workgroup_index is intended for situations when a 3 dimensional
workgroup_id is not available on the HW, but a 1 dimensional index is.
In this case, we can use lower the 3D ID to use this.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15103>
2022-03-08 17:36:31 +00:00
Timur Kristóf 6a4c01f3ef nir: Extract lower_id_to_index into a separate function.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15103>
2022-03-08 17:36:31 +00:00
Timur Kristóf 64acec0ef9 nir: Fix lowering terminology of compute system values: "from"->"to".
This is to match other NIR terminology.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15103>
2022-03-08 17:36:31 +00:00
Jason Ekstrand 541f08cd4c panvk: Non-destructively stub GetRenderAreaGranularity
Don't crash.  Just print a warning and return 1x1.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15285>
2022-03-08 17:03:47 +00:00
Jason Ekstrand afe2ef9afc panvk: Advertise zero sparse format properties
This is the correct implementation when you don't support sparse and
fixes piles of CTS crashes.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15285>
2022-03-08 17:03:47 +00:00
Jason Ekstrand 8feed1f114 panvk: Advertise VK_KHR_get_physical_device_properties2
All the entrypooints are already implemented and a bunch of Vulkan CTS
tests assume this extension exists.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15285>
2022-03-08 17:03:47 +00:00
Rob Clark 3937c47c48 gallium/dri: Add missing in_fence_fd initialization
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6108
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15272>
2022-03-08 16:38:00 +00:00
Yogesh Mohan Marimuthu 3332fcd9c0 vulkan/device_select: add has_vulkan11 flag with has_pci_bus flag
In EnumeratePhysicalDevices(), pci bus info is available only in
vulkan version >= 1.1. hence adding has_vulkan11 flag in places
where has_pci_bus is used in EnumeratePhysicalDevices() code flow.

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14535>
2022-03-08 14:23:41 +00:00
Yogesh Mohan Marimuthu 1cc549949d vulkan/device_select: for vulkan 1.0 use vid/did for boot_vga
In device select layer EnumeratePhysicalDevices() function pci
bus information is available only in case of vulkan >= 1.1.
Hence use vid/did to match boot_vga device in case of vulkan 1.0.

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14535>
2022-03-08 14:23:41 +00:00
Timur Kristóf 5b9bf3434f nir: Fix handling of NV_mesh_shader PRIMITIVE_INDICES output.
PRIMITIVE_INDICES is a flat array in NV_mesh_shader,
not a proper arrayed output, as opposed to D3D-style
mesh shaders where it's addressed by the primitive index.

Prevent assigning several slots to primitive indices,
to avoid issues.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15160>
2022-03-08 13:44:10 +00:00
Rhys Perry d068eb53e8 aco/insert_exec_mask: optimize top-level transition to exact before demote
fossil-db (Sienna Cichlid):
Totals from 5767 (3.55% of 162293) affected shaders:
Instrs: 3264949 -> 3257527 (-0.23%); split: -0.23%, +0.00%
CodeSize: 17835692 -> 17806004 (-0.17%); split: -0.17%, +0.00%
Latency: 45990060 -> 45987924 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 7643850 -> 7643835 (-0.00%); split: -0.00%, +0.00%
Copies: 193641 -> 186219 (-3.83%); split: -3.84%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15244>
2022-03-08 12:49:59 +00:00
Rhys Perry 42a5be975a aco/insert_exec_mask: use get_exec_op
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15244>
2022-03-08 12:49:59 +00:00
Rhys Perry aa55ecc296 aco/insert_exec_mask: fix top-level to-exact with non-global exact mask
After transitioning to exact after a discard, the exec stack might be:
[exact|global, wqm, exact]

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15244>
2022-03-08 12:49:59 +00:00
Cristian Ciocaltea ded789fcaf radeonsi/ci: Mark a bunch of flaky tests on stoney
radeonsi-stoney-gl:amd64 job fails due to random crashes of some
'dEQP-GLES3.functional.buffer.map.write.explicit_flush.*' tests.

Fix the pipeline by adding them to 'radeonsi-stoney-flakes.txt'.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15238>
2022-03-08 12:52:54 +02:00
Cristian Ciocaltea 090f6f1b33 ci/zink: Report flake test
Mark 'KHR-GL46.shader_image_load_store.advanced-sso-subroutine' as
flake since it failed several times while attempting to merge this MR.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15238>
2022-03-08 12:52:54 +02:00
Cristian Ciocaltea e8882f0ef8 ci: Improve interrupt signal handling in crosvm-runner.sh
Run crosvm as a background process in order to allow intercepting
interrupt signals (INT, TERM) and properly release/cleanup any allocated
resources.

This is particularly helpful when one or more crosvm tasks hang, which
will eventually prevent subsequent instances to be started - currently
we can handle up to 128 concurrent crosvm instances per runner.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15238>
2022-03-08 12:52:54 +02:00
Cristian Ciocaltea 1f0a0839eb ci: Increase limit of concurrent crosvm instances per runner
Ensure we can handle up to 128 concurrent crosvm instances per runner
with the current CID generator. This is a safety margin for the new
64-core runners.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15238>
2022-03-08 12:52:54 +02:00
Dave Airlie 8346983775 gallivm/nir: extract a valid texture index according to exec_mask.
When using indirect textures, some lanes may not be active,
particularly in a loop, so as with some other areas, extracting
the correct lane is needed here. This extracts the last valid one.

KHR-GL45.texture_barrier.* on zink.

Fixes: e168d148d7 ("gallivm/nir: handle non-uniform texture offsets")

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15259>
2022-03-08 08:42:06 +00:00
Samuel Pitoiset e449acac9d radv/ci: remove unused files
These files are no longer used.

Fixes: cc327a0fe4 ("amd, ci: Remove unused runners.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Charlie Turner <cturner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15264>
2022-03-08 08:25:34 +01:00
Ilia Mirkin 4e45847d0a freedreno: add a420 deqp-runner files
This doesn't actually get run in CI, but this helps track outstanding
issues / expectations. This is from a run on my IFC6540 with A420.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15251>
2022-03-08 01:23:05 +00:00
Ilia Mirkin 08db7f456a freedreno/a4xx: expose shaders and images, as well as ES 3.1
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15251>
2022-03-08 01:23:05 +00:00
Ilia Mirkin 0277f491ae freedreno/ir3: disable conversion folding on a4xx
Experiments suggest that e.g.

add.u r0.y, hr0.x, hr0.y

will result in the summed value in both the high and low words of r0.y.
This only happens with odd registers, not even ones (r0.x works fine).

Seen in the bit_count lowering (which turns out to be unnecessary, but
this is still a larger problem).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15251>
2022-03-08 01:23:05 +00:00
Ilia Mirkin 4684425150 freedreno/ir3: no need to count bits 16b at a time for a4xx
This also works out nicely since a4xx has some sort of problem with the
16b-based lowering.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15251>
2022-03-08 01:23:05 +00:00
Ilia Mirkin f628fd30de freedreno/a4xx: improve condition for disabling early z
This helps some subtests in the early-z piglit test, but leaves one
occlusion-based test still failing.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15251>
2022-03-08 01:23:05 +00:00
Ilia Mirkin d11543ec52 freedreno/a4xx: extend astc and tg4 workarounds to compute shaders
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15251>
2022-03-08 01:23:05 +00:00
Mike Blumenkrantz 4a03619d81 Revert "lavapipe: accurately set image/ssbo access based on shader usage"
This reverts commit 821a49981f.

still flaky

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15271>
2022-03-07 18:00:42 -05:00
Matt Turner 8860ff3310 intel/perf: Destination array calculation into function
Cuts 119 KiB from iris_dri.so and libvulkan_intel.so.

   text    data     bss     dec     hex filename
 917511       0       0  917511   e0007 meson-generated_.._intel_perf_metrics.c.o (before)
 796986       0       0  796986   c293a meson-generated_.._intel_perf_metrics.c.o (after)

   text    data     bss     dec     hex filename
14130948 365708  210004 14706660 e067e4 iris_dri.so (before)
14009332 365708  210004 14585044 de8cd4 iris_dri.so (after)

   text    data     bss     dec     hex filename
8124225  214264   22820 8361309  7f955d libvulkan_intel.so (before)
8002609  214264   22820 8239693  7dba4d libvulkan_intel.so (after)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
2022-03-07 21:09:54 +00:00
Matt Turner d80d3c6760 intel/perf: Fix mistake in description string
Along with fixing the grammar, this allows it to be deduplicated since
the properly worded description exists in later generations' XMLs.

Cuts 96 B from iris_dri.so and libvulkan_intel.so.

   text	   data	    bss	    dec	    hex	filename
 917613	      0	      0	 917613	  e006d	meson-generated_.._intel_perf_metrics.c.o (before)
 917511	      0	      0	 917511	  e0007	meson-generated_.._intel_perf_metrics.c.o (after)

   text	   data	    bss	    dec	    hex	filename
14131044 365708	 210004	14706756 e06844	iris_dri.so (before)
14130948 365708	 210004	14706660 e067e4	iris_dri.so (after)

   text	   data	    bss	    dec	    hex	filename
8124321	 214264	  22820	8361405	 7f95bd	libvulkan_intel.so (before)
8124225	 214264	  22820	8361309	 7f955d	libvulkan_intel.so (after)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
2022-03-07 21:09:54 +00:00
Matt Turner 7024b8e0eb intel/perf: Mark intel_perf_counter_* enums as PACKED
Reduces their sizes from 4 bytes to 1. Cuts 6 KiB from iris_dri.so and
libvulkan_intel.so.

   text    data     bss     dec     hex filename
 924401       0       0  924401   e1af1 meson-generated_.._intel_perf_metrics.c.o (before)
 917613       0       0  917613   e006d meson-generated_.._intel_perf_metrics.c.o (after)

   text    data     bss     dec     hex filename
14137732 365708  210004 14713444 e08264 iris_dri.so (before)
14131044 365708  210004 14706756 e06844 iris_dri.so (after)

   text    data     bss     dec     hex filename
8131009  214264   22820 8368093  7fafdd libvulkan_intel.so (before)
8124321  214264   22820 8361405  7f95bd libvulkan_intel.so (after)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
2022-03-07 21:09:54 +00:00
Matt Turner 6c0246dcf4 intel/perf: Store indices to strings rather than pointers
The compiler does a good job of deduplicating strings already, but we
can eliminate the pointers to each string by combining the strings into
a single char array and storing only an index into that array.

The longest of the char arrays is the descriptions array, which is a
little over 45 KiB, so still under MSVC's 64 KiB string literal limit
[0]. Because the string length is under 64 KiB we can use uint16_t as
the index type, which roughly doubles our savings as compared to an int.

This cuts 77 KiB from iris_dri.so (0.5%) and libvulkan_intel.so (0.9%).

   text    data     bss     dec     hex filename
 926811   25920       0  952731   e899b meson-generated_.._intel_perf_metrics.c.o (before)
 924401       0       0  924401   e1af1 meson-generated_.._intel_perf_metrics.c.o (after)

   text    data     bss     dec     hex filename
14190852 391628  210004 14792484 e1b724 iris_dri.so (before)
14137732 365708  210004 14713444 e08264 iris_dri.so (after)

   text    data     bss     dec     hex filename
8184097  240184   22820 8447101  80e47d libvulkan_intel.so (before)
8131009  214264   22820 8368093  7fafdd libvulkan_intel.so (after)

relinfo:
iris_dri.so (before): 17765 relocations, 17545 relative (98%), 452 PLT entries, 1 for local syms (0%), 0 users
iris_dri.so (after) : 15605 relocations, 15385 relative (98%), 452 PLT entries, 1 for local syms (0%), 0 users

libvulkan_intel.so (before): 10720 relocations, 6989 relative (65%), 355 PLT entries, 1 for local syms (0%), 0 users
libvulkan_intel.so (after) :  8560 relocations, 4829 relative (56%), 355 PLT entries, 1 for local syms (0%), 0 users

[0] https://docs.microsoft.com/en-us/cpp/cpp/string-and-character-literals-cpp?view=msvc-170&viewFallbackFrom=vs-2019

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
2022-03-07 21:09:54 +00:00
Matt Turner df5e743c80 intel/perf: Use slimmer intel_perf_query_counter_data struct
intel_perf_query_counter contains fields for things we can't or don't
want to store in our static data (like runtime-determined max values) or
oa_read_counter function pointers which are dependent on the GPU gen and
would make deduplication very ineffective.

Cuts 16 KiB from iris_dri.so and libvulkan_intel.so.

   text    data     bss     dec     hex filename
 926811   43200       0  970011   ecd1b meson-generated_.._intel_perf_metrics.c.o (before)
 926811   25920       0  952731   e899b meson-generated_.._intel_perf_metrics.c.o (after)

   text    data     bss     dec     hex filename
14190852 408908  210004 14809764 e1faa4 iris_dri.so (before)
14190852 391628  210004 14792484 e1b724 iris_dri.so (after)

   text    data     bss     dec     hex filename
8184097  257464   22820 8464381  8127fd libvulkan_intel.so (before)
8184097  240184   22820 8447101  80e47d libvulkan_intel.so (after)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
2022-03-07 21:09:54 +00:00
Matt Turner bbbbb0325b intel/perf: Use a function to initialize perf counters
And specifically mark it with ATTRIBUTE_NOINLINE. Otherwise it will be
inlined and actually slightly increase code size.

Cuts 505 KiB from iris_dri.so and libvulkan_intel.so.

   text    data     bss     dec     hex filename
1538720       0       0 1538720  177aa0 meson-generated_.._intel_perf_metrics.c.o (before)
 926811   43200       0  970011   ecd1b meson-generated_.._intel_perf_metrics.c.o (after)

   text    data     bss     dec     hex filename
14751700 365708  210004 15327412 e9e0b4 iris_dri.so (before)
14190852 408908  210004 14809764 e1faa4 iris_dri.so (after)

   text    data     bss     dec     hex filename
8744913  214264   22820 8981997  890ded libvulkan_intel.so (before)
8184097  257464   22820 8464381  8127fd libvulkan_intel.so (after)

Relocations increase because the counter initializations are moved from
code (in .text) to pointers (in .text) to .rodata, which require
relocations.

relinfo:
iris_dri.so (before): 15605 relocations, 15385 relative (98%), 452 PLT entries, 1 for local syms (0%), 0 users
iris_dri.so (after) : 17765 relocations, 17545 relative (98%), 452 PLT entries, 1 for local syms (0%), 0 users

libvulkan_intel.so (before):  8560 relocations, 4829 relative (56%), 355 PLT entries, 1 for local syms (0%), 0 users
libvulkan_intel.so (after) : 10720 relocations, 6989 relative (65%), 355 PLT entries, 1 for local syms (0%), 0 users

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
2022-03-07 21:09:54 +00:00
Matt Turner 5e6c7a572e intel/perf: Deduplicate perf counters
No changes in resulting code (yes, seriously!). GCC constant propagates
the static const arrays into the code, yielding bit for bit identical
results. This will however enable further cleanups.

Before this patch, we emit 11916 different initializations of
intel_perf_query_counter. With this patch we emit an array of 539 and
initialize the intel_perf_query_counters in terms of those.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
2022-03-07 21:09:54 +00:00
Matt Turner 3172b5bbb8 intel/perf: Don't print leading space from desc_units()
Just an annoyance I noticed when I needed to generate the description
string in two different places.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
2022-03-07 21:09:54 +00:00
Emma Anholt 12e065ddec intel/perf: Move some static blocks of C code out of the python script.
Now my editor can help me format code as I type.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15237>
2022-03-07 21:09:54 +00:00
Chia-I Wu c795ae8b88 venus: fix properties of unsupported external fences/semaphores
compatibleHandleTypes should be cleared.

Fixed dEQP-VK.api.external.semaphore.sync_fd.info_timeline.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15266>
2022-03-07 20:43:50 +00:00
Ian Romanick 63d399b3fb iris/ci: Mark amd_performance_monitor tests as flakes.
On one attempt to merge !15210 failed because
spec@amd_performance_monitor@measure,UnexpectedPass.  In that same
report, the other two tests were listed under "some flakes."

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Nanley Chery <nanley.g.chery@intel.com>
Acked-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15220>
2022-03-07 10:54:04 -08:00
Danylo Piliaiev e2fc99b188 turnip: Add "rast_order" debug option to force rast order access
Enables rasterization order attachment access for all pipelines,
see VK_ARM_rasterization_order_attachment_access for details.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15262>
2022-03-07 17:07:18 +00:00
Pierre-Eric Pelloux-Prayer 52ceb9dcb6 gallium/tc: warn if an app is incompatible with cpu_storage
Instead of silently ignoring unmap calls.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15074>
2022-03-07 14:51:16 +01:00
Pierre-Eric Pelloux-Prayer a5a8e19741 radeonsi: enable tc cpu_storage by default
Enable for all applications for all small buffers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15074>
2022-03-07 14:51:15 +01:00
Pierre-Eric Pelloux-Prayer cd0ef9b3f4 gallium/u_threaded: late alloc cpu_storage
Instead of allocating cpu_storage in threaded_resource_init, defer the
allocation to first use (in tc_buffer_map).
This avoids needless memory allocation if tc_buffer_disable_cpu_storage is
called before tc_buffer_map.

map_buffer_alignment is stored and serves as a "can cpu_storage be used" flag.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15074>
2022-03-07 14:51:15 +01:00
Pierre-Eric Pelloux-Prayer 7070178dfd radeonsi: use 1 shader compilation thread if NIR_PRINT is used
This avoids getting multiple shaders NIR code being printed at the
same time making the log unusable.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15074>
2022-03-07 14:51:15 +01:00
Georg Lehmann 6731460194 nir: Fix source type for fragment_fetch_amd.
Like txf_ms, these take integers not floats.

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15242>
2022-03-07 12:21:12 +00:00
Pierre-Eric Pelloux-Prayer 50be692253 radeonsi/tests: always add the --gpu argument
To get the same argument in multi and single gpu situation.

Fixes: 21b0153833 ("radeonsi/tests: print PCI-id of GPU device under test")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15240>
2022-03-07 11:53:14 +01:00
Pierre-Eric Pelloux-Prayer 9c49550163 radeonsi: change rounding mode to round to even
Use ROUND_TO_EVEN instead of TRUNCATE; this matches what pal and radv do.

This fixes the spec@ext_framebuffer_multisample@turn-on-off tests.

Cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15240>
2022-03-07 11:53:14 +01:00
José Expósito 4c3f8d3af8 egl/wayland: fix crash in dri2_initialize_wayland_swrast
When "dri2_wl_formats_init" fails in "dri2_initialize_wayland_swrast",
the "dri2_display_destroy" function is called for clean up. However, the
"dri2_egl_display" was not associated with the display in its
"DriverData" field yet.

The following cast in "dri2_display_destroy":

  struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);

Expands to:

  _EGL_DRIVER_TYPECAST(drvname ## _display, _EGLDisplay, obj->DriverData)

Crashing.

Signed-off-by: José Expósito <jose.exposito89@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13972>
2022-03-07 08:26:01 +00:00