Commit Graph

77279 Commits

Author SHA1 Message Date
Ilia Mirkin e3706a7118 nv50,nvc0: use a face sysval to avoid the useless back-and-forth conversion
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-01-08 17:40:52 -05:00
Kristian Høgsberg Kristensen 82ad571abf glsl: Move _mesa_shader_stage_to_string/abbrev to shader_enums.c
These are used by code that doesn't necessarily link to libglsl.la. Move
them to shader_enums.[ch] where we keep similar helpers.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-01-08 14:26:20 -08:00
Kristian Høgsberg Kristensen 1d25ef6ae7 i965: Move GLSL lowering passes out of libi965_compiler.la
The scope of libi965_compiler.la is to be able to take nir shaders and
generate i965 EU code.  As such, we don't want the GLSL IR lowering
passes in the library. With this change, libi965_compiler.la no longer
needs to link to libglsl.la.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-01-08 14:26:16 -08:00
Kristian Høgsberg Kristensen e97caba1f6 glsl: Move glsl_to_nir files to LIBGLSL_FILES
libglsl_la_SOURCES includes both NIR_FILES and LIBGLSL_FILES, so for
libglsl.la consumers, this is a no-op. libnir.la however no longer uses
any GLSL IR infrastructure and can be used without also linking to
libglsl.la.

Acked-by: Matt Turner <mattst88@gmail.com>
2016-01-08 14:26:12 -08:00
Jordan Justen 1d54ac6c9f mesa: Use separate indices for UBO & SSBO during binding
Previously we were treating the binding index for Uniform Buffer
Objects and Shader Storage Buffer Objects as being part of the
combined BufferInterfaceBlocks array.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93322
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-01-08 13:11:31 -08:00
Jordan Justen cf66a8ffb7 mesa: Map program UBOs and SSBOs to Interface Blocks
v2:
 * Fill UboInterfaceBlockIndex and SsboInterfaceBlockIndex in
   split_ubos_and_ssbos (Iago)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-01-08 13:10:28 -08:00
Jordan Justen c7f6e42a7d anv: Increate dynamic pool block size from 2k to 16k
This is needed because compute push constant data is replicated per
invocation. For gen7, this can be up to 64. With a push constant data
max of 128 bytes, this is 8k of data. We need additional space for
local-id payloads, so we are going with 16k for now.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-01-08 13:03:30 -08:00
Jason Ekstrand 4e15d26e47 nir/spirv: Fix a small bug in row-major matrix loading 2016-01-08 12:27:25 -08:00
Sarah Sharp 5d349fab46 mesa: docs: Add link to planet.freedesktop.org
The freedesktop.org blog feeds aren't mentioned on either mesa3d.org or
any of the graphics project wikis (including the DRI wiki) on
freedeskop.org.  Fix that by linking to it from the sidebar.

Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-01-08 12:18:12 -08:00
Ilia Mirkin dff1caccac freedreno: add ir3_compiler to gitignore
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-01-08 15:16:37 -05:00
Ilia Mirkin 90ba06618e gallium: add a RESQ opcode to query info about a resource
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:33 -05:00
Ilia Mirkin ebfb5446c7 gallium: add PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:33 -05:00
Ilia Mirkin 266d001261 gallium: add PIPE_SHADER_CAP_MAX_SHADER_BUFFERS
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:33 -05:00
Ilia Mirkin 8cb493acc7 tgsi: update atomic op docs
Specify that the operation only applies to the x component, not
per-component as previously specified. This is unnecessary for GL and
creates additional complications for images which need to support these
operations as well.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:33 -05:00
Ilia Mirkin bdef02ff26 tgsi: add a is_store property
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:33 -05:00
Ilia Mirkin 50b8488926 tgsi: provide a way to encode memory qualifiers for SSBO
Each load/store on most hardware can specify what caching to do. Since
SSBO allows individual variables to also have separate caching modes,
allow loads/stores to have the qualifiers instead of attempting to
encode them in declarations.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:32 -05:00
Ilia Mirkin 888ddd632d ureg: add buffer support to ureg
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:32 -05:00
Ilia Mirkin 8cc9a8aa2a tgsi: add ureg support for image decls
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-08 15:10:32 -05:00
Jose Fonseca 208bfc493d glsl: Ensure 64bits shift is used.
I believe that `1u << x`, where x >= 32 yields undefined results
according to the C standard.

Particularly MSVC says `warning C4334: '<<' : result of 32-bit shift
implicitly converted to 64 bits (was 64-bit shift intended?)`.

Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:06:59 +00:00
Jose Fonseca e378184d9c mesa/main: Avoid `void function returning a value` warning.
Trivial.

Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:06:59 +00:00
Oded Gabbay 6613042c4e configure.ac: add --enable-profile
For profiling mesa's code, especially llvmpipe, PROFILE should be
defined. Currently, this define can only be generated if mesa is
built using scons.
This patch makes it possible to generate this define also when building
mesa through automake tools.

v2:

- Change --enable-llvmpipe-profile to --enable-profile
- Add -fno-omit-frame-pointer to CFLAGS and CXXFLAGS when enabling profile

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2016-01-08 21:59:47 +02:00
Jason Ekstrand fe2f44f2a4 nir/spirv: Use create_ssa_value for block_load_store 2016-01-08 11:50:34 -08:00
Jason Ekstrand 8b9dfb4b6d nir/spirv: Add real support for outer products 2016-01-08 11:38:59 -08:00
Jason Ekstrand 927ef0ea4e nir/spirv: Add support for add, subtract, and negate on matrices 2016-01-08 11:26:43 -08:00
Jason Ekstrand 393562f47b nir/spirv: Split ALU operations out into their own file 2016-01-08 11:26:43 -08:00
Marek Olšák 1e463d20ba nine: allow fragment shader POSITION and FACE to be system values
Reported-by: Axel Davy <axel.davy@ens.fr>
2016-01-08 20:07:16 +01:00
Marek Olšák d0cf66d835 vl: allow fragment shader POSITION to be a system value
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:07:16 +01:00
Marek Olšák 69f43c2cc9 util/pstipple: allow fragment shader POSITION to be a system value
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:07:16 +01:00
Marek Olšák 8a13ce14fd st/mesa: add support for POSITION and FACE system values
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:07:15 +01:00
Marek Olšák c00e534283 tgsi/scan: update for POSITION and FACE sytem values
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:07:15 +01:00
Marek Olšák 34738a92de gallium: add caps for POSITION and FACE system values
v2: document the integer behavior

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:07:15 +01:00
Marek Olšák 24737f2298 program: add a helper for rewriting FP position input to sysval
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:06:23 +01:00
Marek Olšák 4191c1a57c glsl: optionally declare gl_FragCoord & gl_FrontFacing as system values
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-01-08 20:06:23 +01:00
Marek Olšák c07cf5f5a9 tgsi/ureg: handle redundant declarations in ureg_DECL_system_value
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-01-08 20:06:22 +01:00
Marek Olšák c886422656 tgsi/ureg: remove index parameter from ureg_DECL_system_value
It can be trivially derived from the number of already declared system
values. This allows ureg users not to worry about which index to choose.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-01-08 20:06:22 +01:00
Marek Olšák 91e8f2b0a5 st/mesa: remove dead code from mesa_to_tgsi
These aren't part of ARB_fragment_program.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2016-01-08 20:06:22 +01:00
Edward O'Callaghan cb513485a0 radeon, si: Use TGSI chan name defines in lp_build_emit_fetch() calls
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-01-08 12:18:36 -05:00
Edward O'Callaghan b42254eff3 gallium/aux: Use TGSI chan name defines inplace of literals
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-01-08 12:18:24 -05:00
Nicolai Hähnle d6db7ceedf mesa: check that internalformat of CopyTexImage*D is not 1, 2, 3, 4
The piglit copyteximage check has recently been augmented to test this, but
apparently it hasn't been fixed in Mesa so far.

This language also already appears in the OpenGL 2.1 spec (Ian).

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-01-08 10:58:27 -05:00
Jason Ekstrand 72bff62e7f nir/spirv: Add support for SSBO atomics 2016-01-07 22:13:46 -08:00
Jason Ekstrand fe57ad62a6 nir/spirv: Rework UBOs and SSBOs
This completely reworks all block load/store operations.  In particular, it
should get row-major matrices working.
2016-01-07 22:13:46 -08:00
Chad Versace 1818463733 anv/gen9: Fix cube surface state
For gen9 SURFTYPE_CUBE, the RENDER_SURFACE_STATE's Depth,
MinimumArrayElement, and RenderTargetViewExtent is in units of full
cubes and so must be divided by 6.

Fixes 'dEQP-VK.pipeline.image.view_type.cube_array.cube_array.*'.

Now all of 'dEQP-VK.pipeline.image.*' passes.
2016-01-07 17:20:25 -08:00
Chad Versace 24d82a3f79 anv/gen8: Refactor genX_image_view_init()
Drop the temporary variables for RENDER_SURFACE_STATE's Depth and
RenderTargetViewExtent. Instead, assign them in-place.

This simplifies the next commit, which fixes gen9 cube surfaces.
2016-01-07 17:20:25 -08:00
Kristian Høgsberg Kristensen 1b1dca75a4 vk: Make sure we emit binding table pointers after push constants
SKL needs this to make sure we flush the push constants. It gets a
little tricky, since we also need to emit binding tables before push
constants, since that may affect the push constants (dynamic buffer
offsets and storage image parameters).  This patch splits emitting
binding tables from emitting the pointers so that we can emit push
constants after binding tables but before emitting binding table
pointers.
2016-01-07 16:31:57 -08:00
Kristian Høgsberg Kristensen a18b5e642c vk: Implement VK_QUERY_RESULT_WITH_AVAILABILITY_BIT 2016-01-07 16:31:57 -08:00
Kristian Høgsberg Kristensen bbf3fc815b vk: Add missing DepthStallEnable to OQ pipe control 2016-01-07 16:31:57 -08:00
Kristian Høgsberg Kristensen 067dbd7a17 vk: Issue PIPELINE_SELECT before setting up render pass
We need to make sure we're selected the 3D pipeline before we start
setting up depth and stencil buffers.
2016-01-07 16:31:57 -08:00
Jordan Justen d24e88b98e anv/gen7: Setup state to enable barrier() function
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-01-07 17:11:46 -08:00
Jordan Justen 36a2304686 anv/gen8: Setup state to enable barrier() function
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-01-07 17:11:46 -08:00
Jason Ekstrand 040e314143 i965/compiler: Enable more lowering in NIR
We don't need these for GLSL or ARB, but we need them for SPIR-V

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-01-07 16:14:42 -08:00