Commit Graph

8 Commits

Author SHA1 Message Date
Eric Anholt 8c47ebbd23 v3d: Rename the driver files from "vc5" to "v3d". 2018-05-16 21:19:07 +01:00
Eric Anholt facc3c6f58 broadcom/vc5: Add support for register spilling.
Our register spilling support is nice to have since vc4 couldn't at all,
but we're still very restricted due to needing to not spill during a TMU
operation, or during the last segment of the program (which would be nice
to spill a value of, when there's a long-lived value being passed through
with little modification from the start to the end).

We could do better by emitting unspills for the last-segment values just
before the last thrsw, since the last segment is probably not the maximum
interference area.

Fixes GTF uniform_buffer_object_arrays_of_all_valid_basic_types and 3
others.
2018-03-19 16:44:06 -07:00
Eric Anholt af9753e246 broadcom/vc5: Update state setup for V3D 4.1. 2018-01-12 21:57:09 -08:00
Eric Anholt ba965084b6 broadcom/vc5: Move texture return channel setup into the compiler.
The compiler decides how many LDTMUs we're going to emit, and that must
match the P1 flags.  This brings the return channel counting to a single
place (so all that's passed into the compiler is "how many return channels
you may request from this texture's format), and was a necessary step for
shadow samplers once we stop using OVRTMUOUT=0.
2018-01-03 14:25:23 -08:00
Eric Anholt 6a78416dab broadcom/vc5: Fix BASE_LEVEL handling with txl.
The HW doesn't add the base level anywhere (the min/max lod clamping is
what does base level), so we need to add it manually in this case.

Fixes piglit tex-miplevel-selection *Lod 2D.
2017-11-22 10:56:31 -08:00
Eric Anholt e717e3e7cd broadcom/vc5: Add lowering for txf_ms to a txf on a 2x2-scaled texture.
The HW has no native sampler support for multisample textures, but since
we only need to support txf_ms and the layout is UIF, we just need to
scale up the texcoords and then add in the sample.

This drops the old TEXTURE_MSAA_ADDR special uniform, since we're treating
MSAA textures as textures, rather than basically texbos like VC4 had to.
2017-10-30 13:31:27 -07:00
Eric Anholt 24c8bbbb75 broadcom/vc5: Use supertiles and generic tile lists.
This massively reduces the size of our RCL setup.  It also gets us closer
to supporting multicore platforms.
2017-10-10 11:42:05 -07:00
Eric Anholt 45bb8f2957 broadcom: Add V3D 3.3 gallium driver called "vc5", for BCM7268.
V3D 3.3 is a continuation of the 3D implementation in VC4 (v2.1 and v2.6).
V3D 3.3 introduces an MMU (no more CMA allocations) and support for
GLES3.1.  This driver is not currently conformant, though that will be a
target as soon as possible.

V3D 3.x parts use a new texture tiling layout common across many Broadcom
graphics parts including and the HVS scanout engine.  It also massively
changes the QPU instructions, introducing a common physical register file
(no more A/B split) and half-float instructions, while removing the 4x8
unorm instructions in favor of half-float for talking to fixed function
interfaces.  Because so much has changed, vc5 is implemented in a separate
gallium driver, using only the XML code-generation support from vc4.

v2: Fix tile layout for 64bpp textures.  Fix texture swizzling for 32-bit
    returns.  Fix up a bit of MRT setup.  Sync the simulator to kernel
    behavior a bit more.  Improve uniform debugging code.  Rebase on
    QIR->VIR rename.  Move texture state mostly to the CSOs.  Improve
    cache flushing on the simulator.  Fix program deletion
    use-after-frees.

Acked-by: Dave Airlie <airlied@gmail.com> (uabi plan)
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> (uabi plan)
2017-10-10 11:42:04 -07:00