Framebuffer access includes framebuffer reads so we need to invalidate
the texture cache. We do not, however, need to flush the depth cache
because you cannot do bind a depth texture as an image.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Texture uploads and downloads may go through the render pipe which may
result in texturing from or rendering to the texture or the PBO. We
need to flush accordingly.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
They made a mistake in the MESA_swap_control XML, which I'm pursuing in
their github. Until then, we can just back this piece out.
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
The GL_EXT_texture_sRGB_decode spec says:
"The conversion of sRGB color space components to linear color space is
always performed if the texel lookup function is one of the texelFetch
builtin functions.
Otherwise, if the texel lookup function is one of the texture builtin
functions or one of the texture gather functions, the conversion of sRGB
color space components to linear color space is controlled by the
TEXTURE_SRGB_DECODE_EXT parameter.
If the TEXTURE_SRGB_DECODE_EXT parameter is DECODE_EXT, the conversion
of sRGB color space components to linear color space is performed.
If the TEXTURE_SRGB_DECODE_EXT parameter is SKIP_DECODE_EXT, the value
is returned without decoding. However, if the texture is also accessed
with a texelFetch function, then the result of texture builtin functions
and/or texture gather functions may be returned with decoding or without
decoding."
This patch makes i965 force sRGB decoding for any textures accessed via
texelFetch(). If textures are accessed via texelFetch() and a regular
texture access function, this will affect the other ones too - which is
fine - it's undefined according to the last paragraph quoted.
We could make both work, but we'd have to emit multiple SURFACE_STATEs,
and have two binding table sections, like we do for texture gather hacks
on older platforms.
Fixes the following Android O CTS test:
dEQP-GLES31.functional.srgb_texture_decode.skip_decode.srgba8.texel_fetch
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Drivers that use Meta are happily using blitting data using texelFetch
and GL_SKIP_DECODE_EXT, but the GL_EXT_texture_sRGB spec unfortunately
makes GL_SKIP_DECODE_EXT not necessarily work with texelFetch.
As a hack, just unset the texture_used_by_txf bitfield so we can
continue with the old desired behavior.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
For TGSI-based drivers, st_glsl_to_tgsi records this information.
For NIR-based drivers, nir_shader_gather_info() will do so.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
I'd like to put this sort of metadata in the shader_info structure,
rather than adding more things to gl_program.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
We want to generate different variants for sisched and unsafe_math
shader variants, so add them to the hash key.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
When I realigned the bufferobj code, I didn't see the getters
were different, realign the getters to work the same as ssbo.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103214
Fixes: 65d3ef7cd (mesa: align atomic buffer handling code with ubo/ssbo (v1.1))
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Taken from their c6a99aff31874697741a08cbc8a3488606ce59c7, keeping the
BUILDING_MESA hunk in place.
Reviewed-by: Daniel Stone <daniels@collabora.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Sure, you'd think that the combination of GL_OES_texture_half_float and
GL_EXT_texture_rg would mean that GL_RG16F exists, but it doesn't.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103227
Fixes: c16a7443e9 ("mesa: Expose GL_OES_required_internalformat on GLES contexts.")
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This is optional (and no CAP).
Implemented by radeonsi, ddebug, rbug, trace.
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Some "standard" (_S) swizzle modes are displayable on Raven,
even though the micro tile mode says it's not displayable.
Expose the addrlib function to the driver.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
The i965 driver has become dependent on x86 specific compiler builtin
functions, so ensure it's disabled for non-x86 builds.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Rob Herring <robh@kernel.org>
If an RS blit is done with source exactly the same as destination, and
the hardware supports this, do an in-place resolve. This only fills in
tiles that have not been rendered to using information from the TS.
This is the same as the blob does and potentially saves significant
bandwidth when doing i.MX6qp scanout using PRE, and when rendering to
textures (though here using sampler TS would be even better).
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
The struct only contained the one field we're interested in.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Fixes: b174a1ae72 "egl: Simplify the "driver" interface"
Cc: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
`_EGLDriver *drv` is a freshly calloc()'ed object, memset(0)'ing some of
it is a no-op.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Bonus: fixes a memleak on haiku when unloading the driver
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
If you set MESA_GLSL_CACHE_DISABLE, radv crashed.
Fixes: fd24be134f (radv: make use of on-disk cache)
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Based on RadeonSI.
This improves some Vulkan demos by +1% to +3%.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
This will allow us to emit the CLEAR_STATE packet instead
of a bunch of useless packets when doing CS initialization.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Similar to RadeonSI, also only call this function for <= VI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Clarify when headers can be updated here.
Reviewed-by: Gurchetan Singh<gurchetansingh@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
The same line of code is a few lines above.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
If the app provided in-memory pipeline cache doesn't yet contain
what we are looking for, or it doesn't provide one at all then we
fallback to the on-disk cache.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This is the drivers on-disk cache intended to be used as a
fallback as opposed to the pipeline cache provided by apps.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Rather than relying on size = stride * height, we can rely on
anv_image's total size.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Daniel Stone <daniels@collabora.com>
It's not used -- DFRACEXP gets array indexes of its exponent out-parameter
lowered earlier -- and it wouldn't have worked correctly anyway when both
dst and dst1 use relative addressing.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Replace the undefined destination by a new temporary register.
Cleanup merge_two_dsts while we're at it.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Make sure we actually allocate two adjacent TGSI temporaries. The
current code fails e.g. when an arithmetic operation has two
operands with indirect accesses.
I will send out a new piglit test
(arb_gpu_shader_int64/execution/indirect-array-two-accesses.shader_test)
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
It's not used, and the assignment for the TGSI case was incorrect
for sampler arrays.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
See the comment for the relevant spec quote.
Fixes dEQP-GLES31.functional.srgb_texture_decode.skip_decode.srgba8.texel_fetch
v2: note the interaction between ARB_bindless_texture and EXT_texture_sRGB_decode
as a TODO
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Jason Ekstrand
Eric Anholt
Kenneth Graunke
Dave Airlie
Marek Olšák
tournier.elie
Rob Herring
Wladimir J. van der Laan
Eric Engestrom
Eric Engestrom
Samuel Pitoiset
Nicolai Hähnle
Timothy Arceri
Lionel Landwerlin