Commit Graph

154728 Commits

Author SHA1 Message Date
Jason Ekstrand dfedeccc13 intel: Only set VectorMaskEnable when needed
For cases with lots of very small primitives, this may improve
performance because we're not executing those dead channels all the
time.

Shader-db reports no instruction or cycle-count changes.  However, by
hacking up the driver to report when this optimization triggers, it
appears to affect about 10% of shader-db.

v2 (Kenneth Graunke): Always enable VMask prior to XeHP for now,
because using VMask on those platforms allows us to perform the
eliminate_find_live_channel() optimization.  However, XeHP doesn't
seem to have packed fragment shader dispatch, so we lose that
optimization regardless, and there's no reason not to avoid vmask.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1054>
2022-05-27 21:52:48 +00:00
Erico Nunes 7c1498daba egl: Fix DETECT_OS macro usage
As described in src/util/detect_os.h, the DETECT_OS macros are always
defined to a 0 or 1 value, and they should be used with #if rather
than #ifdef.
Commit 54b7227f15 accidentally disabled those extensions on all
platforms, so enable them again.

Fixes: 54b7227f15 ("egl/wgl: On win32, there is no support for EGL_EXT_device and EGL_EXT_platform_device")

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16751>
2022-05-27 21:47:11 +02:00
Jason Ekstrand 0d28de212a anv: Don't disable the fragment shader if XFB is enabled
It turns out that we need a fragment shader for streamout.  Whh?  From
Lionel's reading of simulator sources, it seems the streamout unit is
looking at enabled next stages.  It'll generate output to the clipper in
the following cases :

 - 3DSTATE_STREAMOUT::ForceRendering = ON
 - PS enabled
 - Stencil test enabled
 - depth test enabled
 - depth write enabled
 - some other depth/hiz clear condition

Forcing rendering without a PS seems like a recipe for hangs so it's
probably better to just enable the PS in this case.

Fixes: 36ee2fd61c ("anv: Implement the basic form of VK_EXT_transform_feedback")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16506>
2022-05-27 14:33:53 +00:00
Jason Ekstrand 73b3efcd59 anv: Handle the null FS optimization after compiling shaders
Actually compile and cache the no-op fragment shader but remove it from
the pipeline if we determine it's a no-op.  This way we always have it
even if it's not strictly needed.

Fixes: 36ee2fd61c ("anv: Implement the basic form of VK_EXT_transform_feedback")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16506>
2022-05-27 14:33:53 +00:00
Jason Ekstrand 9fe6caf4e7 anv: Drop alpha_to_coverage from the NULL FS optimization
Starting with Ivy Bridge, we implement alpha-to-coverage by writting
gl_SampleMask with a pattern based on alpha.  This will show up in
wm_prog_data::uses_omask so we don't need to look at the key.

Fixes: 36ee2fd61c ("anv: Implement the basic form of VK_EXT_transform_feedback")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16506>
2022-05-27 14:33:53 +00:00
Jason Ekstrand 1b9248e761 intel/fs: Copy color_outputs_valid into wm_prog_data
Fixes: 36ee2fd61c ("anv: Implement the basic form of VK_EXT_transform_feedback")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16506>
2022-05-27 14:33:53 +00:00
Jason Ekstrand 8379993223 intel/fs: Drop fs_visitor::emit_alpha_to_coverage_workaround()
It no longer exists.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16506>
2022-05-27 14:33:53 +00:00
Mike Blumenkrantz 3394e81eb1 vtn: assert that composite members have the same bit size as the result
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16667>
2022-05-27 14:06:32 +00:00
Mike Blumenkrantz 54e1072ff6 vtn: assert that vector shuffle indices are in-bounds
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16667>
2022-05-27 14:06:32 +00:00
Alyssa Rosenzweig 01ba3460a9 pan/bi: Test CMP result_type optimization
Add unit tests ensuring the optimization applies in all the cases we care about,
as functional integration tests (CTS and Piglit) won't test this. Also add unit
tests for a few cases where we specifically cannot fuse, in case these cases are
missed by the tests.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16725>
2022-05-27 12:14:22 +00:00
Alyssa Rosenzweig 501a66cb5c pan/bi: Fuse result types
In NIR, comparison instructions always produce 0/~0 results. For other result
types, a separate b2f32 or b2i32 instruction is used to transform the result.
However, Mali's comparison instructions have modifiers for these alternate
result types, so we can implement expressions like int(a < b) and float(a ==
b) in single instruction. Add a peephole optimization to fuse comparisons
with result type transformations.

Results on Mali-G52:

total instructions in shared programs: 2439696 -> 2434339 (-0.22%)
instructions in affected programs: 418703 -> 413346 (-1.28%)
helped: 1630
HURT: 0
helped stats (abs) min: 1.0 max: 28.0 x̄: 3.29 x̃: 2
helped stats (rel) min: 0.11% max: 19.35% x̄: 1.64% x̃: 1.39%
95% mean confidence interval for instructions value: -3.44 -3.13
95% mean confidence interval for instructions %-change: -1.72% -1.56%
Instructions are helped.

total tuples in shared programs: 1946581 -> 1943005 (-0.18%)
tuples in affected programs: 251742 -> 248166 (-1.42%)
helped: 1113
HURT: 11
helped stats (abs) min: 1.0 max: 32.0 x̄: 3.23 x̃: 2
helped stats (rel) min: 0.17% max: 15.38% x̄: 1.80% x̃: 1.38%
HURT stats (abs)   min: 1.0 max: 2.0 x̄: 1.45 x̃: 1
HURT stats (rel)   min: 0.21% max: 3.12% x̄: 1.23% x̃: 0.89%
95% mean confidence interval for tuples value: -3.35 -3.01
95% mean confidence interval for tuples %-change: -1.88% -1.66%
Tuples are helped.

total clauses in shared programs: 357791 -> 357349 (-0.12%)
clauses in affected programs: 15879 -> 15437 (-2.78%)
helped: 371
HURT: 3
helped stats (abs) min: 1.0 max: 8.0 x̄: 1.20 x̃: 1
helped stats (rel) min: 0.80% max: 33.33% x̄: 3.85% x̃: 2.17%
HURT stats (abs)   min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 2.94% max: 5.26% x̄: 4.49% x̃: 5.26%
95% mean confidence interval for clauses value: -1.27 -1.09
95% mean confidence interval for clauses %-change: -4.21% -3.36%
Clauses are helped.

total cycles in shared programs: 167922.04 -> 167810.71 (-0.07%)
cycles in affected programs: 6772.08 -> 6660.75 (-1.64%)
helped: 655
HURT: 12
helped stats (abs) min: 0.041665999999999315 max: 1.3333319999999986 x̄: 0.17 x̃: 0
helped stats (rel) min: 0.18% max: 20.00% x̄: 2.02% x̃: 1.60%
HURT stats (abs)   min: 0.041665999999999315 max: 0.125 x̄: 0.05 x̃: 0
HURT stats (rel)   min: 0.21% max: 3.80% x̄: 1.23% x̃: 0.88%
95% mean confidence interval for cycles value: -0.18 -0.16
95% mean confidence interval for cycles %-change: -2.10% -1.81%
Cycles are helped.

total arith in shared programs: 74393.17 -> 74243.08 (-0.20%)
arith in affected programs: 10157.50 -> 10007.42 (-1.48%)
helped: 1129
HURT: 12
helped stats (abs) min: 0.041665999999999315 max: 1.3333319999999986 x̄: 0.13 x̃: 0
helped stats (rel) min: 0.18% max: 50.00% x̄: 1.94% x̃: 1.40%
HURT stats (abs)   min: 0.041665999999999315 max: 0.125 x̄: 0.05 x̃: 0
HURT stats (rel)   min: 0.21% max: 3.80% x̄: 1.23% x̃: 0.88%
95% mean confidence interval for arith value: -0.14 -0.12
95% mean confidence interval for arith %-change: -2.06% -1.76%
Arith are helped.

total quadwords in shared programs: 1692019 -> 1688164 (-0.23%)
quadwords in affected programs: 216669 -> 212814 (-1.78%)
helped: 1148
HURT: 11
helped stats (abs) min: 1.0 max: 41.0 x̄: 3.37 x̃: 2
helped stats (rel) min: 0.17% max: 17.24% x̄: 2.25% x̃: 1.73%
HURT stats (abs)   min: 1.0 max: 2.0 x̄: 1.09 x̃: 1
HURT stats (rel)   min: 0.60% max: 1.32% x̄: 0.85% x̃: 0.83%
95% mean confidence interval for quadwords value: -3.49 -3.16
95% mean confidence interval for quadwords %-change: -2.33% -2.10%
Quadwords are helped.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16725>
2022-05-27 12:14:22 +00:00
Timur Kristóf 112a856813 nir: Keep track of cross-invocation mesh shader output access.
On some implementations eg. AMD RDNA2 the driver can generate a
more optimal code path knowing whether outputs are indexed using the
local invocation index or not.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16736>
2022-05-27 11:22:07 +00:00
Tatsuyuki Ishi cd14431b8c radv/ci: skip dEQP-VK.fragment_operations.transient_attachment_bit
Until the CTS bug is fixed.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16663>
2022-05-27 09:43:04 +00:00
Tatsuyuki Ishi 211db6d333 radv: Fix redundant subpass barriers due to erroneous comparison
We accidentally compared the stencil layout to the color/depth layout.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16663>
2022-05-27 09:43:04 +00:00
Yogesh Mohan Marimuthu 1a8b03732f vulkan/wsi: fix extra free if buffer_blit_queue
In wsi_destroy_image(), if buffer_blit_queue then
do not call extra free. This will fix assert in
debug release and accessing out of allocated memory.

Fixes:
  7bd5aa111c
  ("vulkan/wsi: add a private transfer pool to exec the DRI_PRIME blit")

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset's avatarSamuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16649>
2022-05-27 09:19:15 +00:00
Timur Kristóf 77a67f1115 radv: Add mesh and task stage names to pipeline executable properties.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16712>
2022-05-27 08:46:29 +00:00
Timur Kristóf 8aff8d3dd4 nir: Add common task shader lowering to make the backend's job easier.
1. Lowers NV_mesh_shader TASK_COUNT output to launch_mesh_workgroups.

2. Removes all code after launch_mesh_workgroups, enforcing the
fact that it's a terminating instruction.

3. Ensures that task shaders always have at least one
launch_mesh_workgroups instruction, so the backend doesn't
need to implement a special case when the shader doesn't have it.

4. Optionally, implements task_payload using shared memory when
task_payload atomics are used.
This is useful when the backend is otherwise not capable of
handling the same atomic features as it can for shared memory.
If this is used, the backend only has to implement the basic
load/store operations for task_payload.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16720>
2022-05-27 07:52:03 +00:00
Timur Kristóf 9eaf918ed2 nir: Add new launch_mesh_workgroups intrinsic.
The new intrinsic launches mesh shader workgroups
from a task shader, with explicit task_payload.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16720>
2022-05-27 07:52:03 +00:00
David Heidelberg c9f0a511e0 ci/panfrost: add RoR and Nheko traces
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
2022-05-27 06:51:38 +00:00
David Heidelberg da70c1b9f0 ci/virgl: traces: add RoR and Nheko traces
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
2022-05-27 06:51:38 +00:00
David Heidelberg 0a9461caf5 ci/radeonsi: add RoR and Nheko traces
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
2022-05-27 06:51:38 +00:00
David Heidelberg 2d42335fb8 ci/llvmpipe: add RoR and Nheko traces
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
2022-05-27 06:51:38 +00:00
David Heidelberg 9f3c91850b ci/crocus: add RoR and Nheko traces
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
2022-05-27 06:51:38 +00:00
David Heidelberg b19c858f3d ci/intel: add RoR and Nheko traces and reenable most of Valve traces
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
2022-05-27 06:51:38 +00:00
David Heidelberg 270e0d45fb ci/i915: add entries for RoR and Nheko traces
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
2022-05-27 06:51:38 +00:00
David Heidelberg b8381aaa37 ci/freedreno: enable ROR and Nheko traces
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
2022-05-27 06:51:38 +00:00
David Heidelberg 6bbe457f68 ci/virgl: fix checksum for valve traces which run on iris
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
2022-05-27 06:51:38 +00:00
Kenneth Graunke 7577ca7e6a mesa: Avoid temp images in _mesa_texstore_*_dxt* for stride = 0
We're getting a source stride of 0 here sometimes, which I believe means
to just use the natural stride, which is what we wanted anyway.  No need
to fall back to a temporary image in that case.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16631>
2022-05-27 01:47:33 +00:00
Kenneth Graunke 035e6e32f1 mesa: Require temp images in _mesa_texstore_*_dxt* with SkipImages
The S3TC compressor code doesn't support this, but our lack of checking
was being papered over by the stride checks being overly picky.  This
is needed to prevent regressions in the next commit.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16631>
2022-05-27 01:47:33 +00:00
Kenneth Graunke 6910891c7f mesa: Avoid temp images in _mesa_texstore_rgb_dxt1 for GL_RGBA source
The compressor can handle 3 or 4-component sources, so allow a GL_RGBA
source and just pass that along with the correct number of components.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16631>
2022-05-27 01:47:33 +00:00
Kenneth Graunke 5602f424c3 mesa: Split tx_compress_dxtn into per-format functions
This avoids an unnecessary switch statement in many cases.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16631>
2022-05-27 01:47:33 +00:00
Marek Olšák eb673c55f1 st/mesa: remove unused GENERIC input and output from the clear VS
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Tested-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16711>
2022-05-27 00:01:41 +00:00
Marek Olšák 3d6e44fd2a r300,r600,svga: save the FS constant buffer for u_blitter to fix a regression
Fixes: 773a23eb6d - gallium/u_blitter: clear color buffers using color from a constant buffer
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6548
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6539

Tested-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Tested-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16711>
2022-05-27 00:01:41 +00:00
Yonggang Luo d827d433ce util: Fixes typo in test_util_get_process_exec_path
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16723>
2022-05-26 23:27:50 +00:00
Yonggang Luo aa7446b17e util: Fixes test_util_get_process_exec_path on windows host with msys2/mingw
```
stderr:
Error: Test 'test_util_get_process_exec_path' failed:
        Expected="C:/work/xemu/xemu-opengl/mesa/build/windows-mingw64/src/util/process_test.exe", Actual="C:\work\xemu\xemu-opengl\mesa\build\windows-mingw64\src\util\process_test.exe"
――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――
```

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16723>
2022-05-26 23:27:50 +00:00
Alejandro Piñeiro 746287d221 v3dv/format: Add support for VK_KHR_format_feature_flags2
VK_KHR_format_feature_flags2 is mostly about define a new 64-bit
VkFormatFeatureFlagBits2KHR format feature flag type, as 29 bits of
the 32-bit VkFormatFeatureFlagBits are already in use.

So all the bits from VkFormatFeatureFlagBits are being replicated, and
most of the work here consist on switch to the new flags.

From the new (not replicated from VkFormatFeatureFlagBits) flag bits,
we don't support
VK_FORMAT_FEATURE_2_STORAGE_READ_WITHOUT_FORMAT_BIT_KHR or
VK_FORMAT_FEATURE_2_STORAGE_WRITE_WITHOUT_FORMAT_BIT_KHR, as right now
we require the format on the shader for doing the read and stores.

We use now VK_FORMAT_FEATURE_2_SAMPLED_IMAGE_DEPTH_COMPARISON_BIT_KHR,
but only applying it for depth formats.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16718>
2022-05-26 21:20:50 +00:00
Alejandro Piñeiro 11a0ea76a2 v3dv/format: no need for GetPhysicalDeviceFormatProperties
The common Mesa Vulkan framework already provides a common
implementation based on GetPhysicalDeviceFormatProperties2.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16718>
2022-05-26 21:20:50 +00:00
Mike Blumenkrantz 0c4a65ef34 zink: update radv piglit fails
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16727>
2022-05-26 18:43:16 +00:00
Alyssa Rosenzweig 6450037b32 panfrost: Use tiled AFBC textures
On GPUs that support AFBC with tiled headers, try to use tiled headers instead
of linear headers. This should be a bit more efficient for the caches.
Additionally, on Mali, tiled headers are tied to solid colour blocks, so this
has the effect of enabling AFBC with solid colour blocks where supported.

Unfortunately, results are disappointing. Mali-G52:

-btexture from 856fps to 859fps
-bdesktop from 292fps to 294fps

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig 0255f554f3 panfrost: Advertise 16x16 tiled AFBC
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig 1f1da58ed1 panfrost: Gate tiled AFBC on GPUs that support it
Introduced with v7.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig 3fbfd356af panfrost: Add helper checking tiled AFBC support
Tiled AFBC support was introduced with v7. Add a helper encoding this fact.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig 5fa274fee4 panfrost: Handle AFBC Tiled
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig b63dad3ce5 panfrost: Put comment in correct #ifdef
Minor fix to make the code less confusing.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig bd529b7983 panfrost: Fix AFBC flags on v6
Tiled headers and bounds checking were introduced with v7. The flags don't exist
on v6. Fix the XML accordingly so we don't accidentally use features too new for
the hardware.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig 166d879ff0 panfrost: Add 1x1 layout unit tests
These check the alignments are correct. Of course, ideally these cases aren't
hit in practice, since it's a waste of memory.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig 65ba39f84c panfrost: Add a tiled 16x16 layout unit test
To exercise the layout code introduced in this series.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig d11945cd85 panfrost: Calculate header_size based on row_stride
The header size is the header stride times the number of rows in the header
(number of tiles of superblocks). We already calculate the header stride, so
eliminate the separate header size calculation.

Delete the old header size calculation. It has no notion of wide blocks, let
alone tiled AFBC headers.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig 0cf6091bd0 panfrost: Add 3D texture layout unit test
3D AFBC is pretty subtle, let's make sure we have adequate unit test coverage.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
2022-05-26 15:56:32 +00:00
Alyssa Rosenzweig 5944bbfa94 panfrost: Add AFBC stride unit tests
Demonstrating correctness of the low level calculations.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16697>
2022-05-26 15:56:32 +00:00