Commit Graph

121644 Commits

Author SHA1 Message Date
Lionel Landwerlin f5c5574f42 intel/perf: move register definition to special file
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344>
2020-03-27 14:14:49 +00:00
Andres Gomez b9d2b5dcec gitlab-ci/traces: Add D3D11 sample entry for POLARIS10
v2:
  - Updated traces-db commit.
  - Changed the reference DXVK trace.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Andres Gomez 07e5b3ad50 gitlab-ci: add Wine and DXVK env variables to Vulkan's tracie runner
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Andres Gomez 6bae042b3d gitlab-ci: replay apitrace traces in headless mode
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Andres Gomez 9f4acd465e gitlab-ci: add apitrace's DXGI traces support
v2:
  - Pass the whole retrace command for apitrace traces (Alexandros).

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Andres Gomez fb8fa83a30 gitlab-ci: add Wine, win64's apitrace and DXVK to the Vulkan testing container
In preparation for having automated testing with DXGI traces.

v2:
  - Updated DXVK version.
  - Merged the new Wine container into the existing Vulkan
    one (Michel).

v3:
  - Updated commit log.
  - Use a particular known-good apitrace version (Alexandros).

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Andres Gomez 05a3b49308 gitlab-ci: Don't use buster-backports packages by default for x86_test-vk
The backports repository can be temporarily inconsistent between
architectures, which can break the docker image build.

Suggested-by: Michel Dänzer <mdaenzer@redhat.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4238>
2020-03-27 13:48:17 +00:00
Daniel Stone 4a8876b025 CI: Windows: Fix Docker tag argument inversion
docker tag takes its arguments as source and dest, not dest and source.
Went unnoticed as the host already had a tag for my image when I was
testing.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4346>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4346>
2020-03-27 13:23:33 +00:00
Daniel Stone 07885cbcdb CI: Add native Windows VS2019 build
Adds a native build of Mesa using Meson with the Visual Studio 2019
toolchain on a Windows host.

Though Docker is supported on Windows, Docker-in-Docker is not possible,
nor are podman and skopeo available. We handle this by creating the
container from a shell-executor Windows machine, which gives us a native
PowerShell that we can execute Docker from. This attempts to do the same
copy-from-upstream-or-create-if-not-exists optimisation as the
ci-templates do for our Linux builds, albeit open-coded in PowerShell.

The Mesa build itself is executed inside a container, using Meson and
Ninja.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Acked-by: Brian Paul <brianp@vmware.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4304>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4304>
2020-03-27 10:32:47 +00:00
Daniel Stone bc98de4d14 util/test: Use MAX_PATH on Windows
Windows provides MAX_PATH rather than PATH_MAX for the maximum allowable
path length. This is not a limit on the length of filename which can
exist on the filesystem, but a length on the length of path which can be
passed to Win32 API calls.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Fixes: f8f1413070 ("util/u_process: add util_get_process_exec_path")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4304>
2020-03-27 10:32:47 +00:00
Pierre-Eric Pelloux-Prayer 8f573bdaaa util: fix process_test path
Make sure we only use winepath when needed.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Fixes: f8f1413070 ("util/u_process: add util_get_process_exec_path")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2690
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4304>
2020-03-27 10:32:31 +00:00
Tomeu Vizoso 1351ee0335 gitlab-ci: Disable jobs for Collabora's LAVA lab
The lab is going down for a few hours to upgrade the LAVA installation
to the latest stable release.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4342>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4342>
2020-03-27 09:25:20 +01:00
Timothy Arceri b5e00f5c2b nir: fix packing of TCS varyings not read by the TES
Unlike other stages TCS outputs not read by the TES cannot always
be demoted to globals e.g. when they are read by other TCS
invocations.

We were not taking these outputs into account when packing which
could result in other outputs being assigned to the same location.

Here we make sure to gather information on these outputs and group
them together when packing.

This fixes rendering issues in QUBE 2 via Proton.

Closes: #2653
Fixes: 26aa460940 ("nir: rewrite varying component packing")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4328>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4328>
2020-03-27 07:26:39 +00:00
Timothy Arceri 8b9ebbcb54 glsl: fix varying packing for 64bit integers
Without this we can incorrectly end up marking things as making
use of ARB_enhanced_layouts style packing.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4328>
2020-03-27 07:26:39 +00:00
Samuel Pitoiset ba2ec1f369 ac/nir: use llvm.amdgcn.rcp in ac_build_fdiv()
Instead of emitting 1.0 / x which includes a slow division that
LLVM doesn't always optimize even if the metadata is correctly set.

No pipeline-db changes with VEGA10/LLVM 9.

pipeline-db (VEGA10/LLVM 10):
Totals from affected shaders:
SGPRS: 6672 -> 6672 (0.00 %)
VGPRS: 6652 -> 6652 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 561780 -> 561692 (-0.02 %) bytes
Max Waves: 1043 -> 1043 (0.00 %)

pipeline-db (VEGA10/LLVM 11 - 92744f62478):
Totals from affected shaders:
SGPRS: 84608 -> 83768 (-0.99 %)
VGPRS: 106768 -> 106636 (-0.12 %)
Spilled SGPRs: 1625 -> 1713 (5.42 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 10850936 -> 10726712 (-1.14 %) bytes
Max Waves: 3152 -> 3180 (0.89 %)

LLVM 11 (master) is more affected than previous versions, but
based on the small impact with LLVM 9/10, I decided to emit it
unconditionally.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4326>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4326>
2020-03-27 08:05:43 +01:00
Samuel Pitoiset d548384fc6 ac/nir: use llvm.amdgcn.rsq for nir_op_frsq
Instead of emitting 1.0 / sqrt(x) which includes a slow division that
LLVM doesn't always optimize even if the metadata is correctly set.

pipeline-db (VEGA10/LLVM 9):
Totals from affected shaders:
SGPRS: 16872 -> 16864 (-0.05 %)
VGPRS: 15320 -> 15464 (0.94 %)
Spilled SGPRs: 2021 -> 2133 (5.54 %)
Code Size: 1915464 -> 1917476 (0.11 %) bytes
Max Waves: 641 -> 639 (-0.31 %)

pipeline-db (VEGA10/LLVM 10):
Totals from affected shaders:
SGPRS: 43936 -> 44120 (0.42 %)
VGPRS: 41776 -> 41972 (0.47 %)
Spilled SGPRs: 875 -> 875 (0.00 %)
Code Size: 4468164 -> 4468120 (-0.00 %) bytes
Max Waves: 2412 -> 2414 (0.08 %)

pipeline-db (VEGA10/LLVM 11 - 92744f62478):
Totals from affected shaders:
SGPRS: 60096 -> 60096 (0.00 %)
VGPRS: 63552 -> 63648 (0.15 %)
Spilled SGPRs: 6135 -> 6117 (-0.29 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 6252996 -> 6249772 (-0.05 %) bytes
Max Waves: 2324 -> 2337 (0.56 %)

LLVM 11 (master) is more affected than previous versions, but
based on the small impact with LLVM 9/10, I decided to emit it
unconditionally.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4326>
2020-03-27 07:45:47 +01:00
Samuel Pitoiset 66426ce119 ac/nir: use llvm.amdgcn.rcp for nir_op_frcp
Instead of emitting 1.0 / x which includes a slow division that
LLVM doesn't always optimize even if the metadata is correctly set.

pipeline-db (VEG10/LLVM 9):
Totals from affected shaders:
SGPRS: 50384 -> 50312 (-0.14 %)
VGPRS: 42572 -> 42696 (0.29 %)
Spilled SGPRs: 1372 -> 1372 (0.00 %)
Code Size: 5692040 -> 5691428 (-0.01 %) bytes
Max Waves: 3954 -> 3951 (-0.08 %)

pipeline-db (VEG10/LLVM 10):
Totals from affected shaders:
SGPRS: 78512 -> 78464 (-0.06 %)
VGPRS: 62408 -> 62484 (0.12 %)
Spilled SGPRs: 1502 -> 1502 (0.00 %)
Code Size: 8106188 -> 8103372 (-0.03 %) bytes
Max Waves: 7759 -> 7753 (-0.08 %)

pipeline-db (VEGA10/LLVM 11 - 92744f62478):
Totals from affected shaders:
SGPRS: 112760 -> 113232 (0.42 %)
VGPRS: 111132 -> 110568 (-0.51 %)
Spilled SGPRs: 5870 -> 5940 (1.19 %)
Spilled VGPRs: 650 -> 652 (0.31 %)
Code Size: 11887232 -> 11561744 (-2.74 %) bytes
Max Waves: 8964 -> 9015 (0.57 %)

LLVM 11 (master) is more affected than previous versions, but
based on the small impact with LLVM 9/10, I decided to emit it
unconditionally.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4326>
2020-03-27 07:45:43 +01:00
H.J. Lu e352e7e792 x86: Add ENDBR at function entries
Intel Control-flow Enforcement Technology (CET):

https://software.intel.com/en-us/articles/intel-sdm

contains shadow stack (SHSTK) and indirect branch tracking (IBT).
When IBT is enabled, all indirect branch targets must start with
ENDBR instruction which is a NOP on non-CET processors.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2538

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ben Widawsky <ben.widawsky@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3865>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3865>
2020-03-26 16:38:46 -07:00
Marek Olšák 9899a8e26c mesa: try to fix the android build
Fixes: 8a3e2cd9b2
Closes: #2685

Acked-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4325>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4325>
2020-03-26 18:43:42 -04:00
Francisco Jerez 36c155a017 intel/fs/gen12: Fix interaction of SWSB dependency combination with EU fusion workaround.
This has been reported to fix a hang in Shadow of Mordor on Gen12.
One of its compute shaders seems to cause an in-order exec_all
dependency to be merged into an out-of-order SET dependency slot,
which would prevent us from baking the SET dependency into the parent
instruction, leading to an assert failure in emit_inst_dependencies()
(Thanks to Rafael for noticing that).  Prevent that by avoiding
combination of in-order dependencies whenever that would cause a SET
dependency to be demoted to a SYNC.NOP instruction.

Fixes: e14529ff32 "intel/fs/gen12: Workaround data coherency issues due to broken NoMask control flow."
Tested-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2020-03-26 19:09:42 +00:00
H.J. Lu 007e623025 x86_init_func_common: Add ENDBR at function entry
Intel Control-flow Enforcement Technology (CET):

https://software.intel.com/en-us/articles/intel-sdm

when IBT is enabled, all indirect branch targets must start with ENDBR
instruction which is a NOP on non-CET processors.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2575

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ben Widawsky <ben.widawsky@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3985>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3985>
2020-03-26 18:36:20 +00:00
Danylo Piliaiev 2d0599b1b4 intel/aub_viewer: Fix format specifier for uint64_t
Use PRIx64 instead of lx for uint64_t

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2692
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4331>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4331>
2020-03-26 18:00:15 +00:00
Icecream95 7b9f1b6ef7 panfrost: Extend the tiled store fast-path to loads
The access functions are forced to be inline, so performance shouldn't
be impacted for stores.

WebGL performance in Firefox is more than doubled, and track loading
in STK is noticeably faster.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4317>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4317>
2020-03-26 14:34:55 +00:00
Icecream95 dac1573a35 mesa/format_utils: Add a fast-path for RGBA to BGRA
This is similar to an existing fast-path, but this is for an array
source while the existing one is for an array destination.

Firefox can hit this case for WebGL when GL compositing is not used.
For a WebGL sample on the Panfrost driver, the frame-rate increased
from 19.4 fps to 20.6 fps, which is a 6% gain.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4315>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4315>
2020-03-26 13:36:47 +00:00
Tapani Pälli 0847fe6e7f glsl: set error_emitted true if type not ok for assignment
Patch changes also existing assert to not trigger when we have
error types in assignment.

v2: simplify, cleanup (Ian)

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2629
Fixes: d1fa69ed61 ("glsl: do not attempt assignment if operand type not parsed correctly")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4178>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4178>
2020-03-26 12:41:12 +00:00
Alexandros Frantzis 05069e1f07 gitlab-ci: Fix traces caching in tracie
We are currently comparing a hex string representation of the git lfs
OID with a byte array representation of the locally calculated OID,
causing detection of valid cached traces to fail. Ensure we are
comparing compatible representations (in this case hex strings).

Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4300>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4300>
2020-03-26 13:55:26 +02:00
Boris Brezillon efdce97e4b vtn/opencl: add rint-support
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund 6d69ed88f8 vtn/opencl: add native exp2/log2-support
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund 7b2bfb6bc4 vtn/opencl: add native exp10/log10-support
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund 25cb87bcdd vtn/opencl: add native exp/log-support
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund c98e745e78 compiler/nir: move build_log helper into builtin-builder
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund f59ae68838 compiler/nir: move build_exp helper into builtin-builder
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Erik Faye-Lund 4821ec6d8f vtn/opencl: fully enable OpenCLstd_Clz
Fixes: 7325f6ac98 ("vtn/opencl: add clz support")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
2020-03-26 10:14:22 +00:00
Neil Armstrong 51831537a2 gitlab-ci: re-enable mali400/450 and t820 jobs
The FILES_HOST_NAME and FILES_HOST_URL are in the baylibre's runner
environment to make it more flexible.

Also use the new aarch64 mesa-ci-aarch64-lava-baylibre runner with
embedded nginx server to serve the LAVA artifacts.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>
2020-03-26 09:30:48 +00:00
Neil Armstrong 842f13d8f8 gitlab-ci: add FILES_HOST_URL and move FILES_HOST_NAME into jobs
The FILES_HOST_URL & FILES_HOST_NAME will be in the Baylibre's runner
environment, move them into the t860/t720/t760 jobs using Collabora's
runner.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>
2020-03-26 09:30:48 +00:00
Tomeu Vizoso b123849880 gitlab-ci: Serve files for LAVA via separate service
Currently, we store the kernel and ramdisk for each LAVA job in the
artifacts of the job that built them. Because artifacts are stored in
GCE and LAVA labs aren't, this causes a lot of egress with is expensive.

To avoid this, have runners download most of the data via the (cached)
container images once, and for each job upload the kernel and ramdisk to
a server outside GCE.

Right now we only have Collabora's runner with a local web server, so
jobs that go to Baylibre's lab have been disabled.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>
2020-03-26 09:30:48 +00:00
Tomeu Vizoso 92f3c51560 gitlab-ci: Place files from the Mesa repo into the build tarball
There's some files from the .gitlab-ci directory that are needed in the
test stage and that, because the Mesa repository isn't checked out in
that stage, need to be made available through other means.

Because those files are going to be needed in LAVA devices, place them
ino the tarball containing the built files so it's available to both
gitlab-ci runners and LAVA devices.

Before those files were passed in the artifacts of the Gitlab CI job,
but this commit places them into the built tarball so scripts later in
the pipeline don't need to account for this discrepancy.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>
2020-03-26 09:30:48 +00:00
Marek Olšák b94c277fd1 radeonsi: enable full out-of-order drawing when allow_draw_out_of_order is set
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
2020-03-26 03:08:34 -04:00
Marek Olšák 8c053e5fad mesa: allow out-of-order drawing to optimize immediate mode if it's safe
This increases performance by 11-13% in Viewperf11/Catia - first scene.

Set allow_draw_out_of_order=true to enable this.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
2020-03-26 03:08:34 -04:00
Marek Olšák 0c6a667d93 glsl_to_tgsi: set shader_info::writes_memory
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
2020-03-26 03:08:34 -04:00
Marek Olšák 85a723975b nir: add and gather shader_info::writes_memory
for out-of-order drawing.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
2020-03-26 03:08:34 -04:00
Kristian H. Kristensen d269fb33b0 radeonsi: Stop exposing PIPE_SHADER_CAP_FP16
Not fully supported.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4321>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4321>
2020-03-25 22:43:41 +00:00
Vinson Lee 603f38f171 util/u_process: Add util_get_process_exec_path for macOS.
Fixes: f8f1413070 ("util/u_process: add util_get_process_exec_path")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2682
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4313>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4313>
2020-03-25 14:38:03 -07:00
Christian Gmeiner 8cdace95ac freedreno: ssbo: mark resource read or written depending on usage
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>
2020-03-25 20:49:32 +00:00
Christian Gmeiner 061b262a0c freedreno: ssbo: keep track if a buffer gets written
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>
2020-03-25 20:49:32 +00:00
Christian Gmeiner 0ed053f03d freedreno: simplify fd_set_shader_buffers(..)
Clear the modified bits for enabled_mask and then iterate over the
whole range and set the specific bit where there is a buffer.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>
2020-03-25 20:49:32 +00:00
Christian Gmeiner 3340cbd398 freedreno: calculate modified bit mask only once
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>
2020-03-25 20:49:32 +00:00
Roland Scheidegger 3cbcb1b73e gallium/util: Add back (and rename) util_float_to_half implementation
This implementation was removed by 8b8af6d3 ("gallium/util: Switch
util_float_to_half to _mesa_float_to_half()'s impl.")
It was not actually broken, but _mesa_float_to_half() implements
round-to-nearest-even, whereas util_float_to_half() implemented
round-to-zero. So rename it appropriately.
GL actually never cares about rounding (except a broken piglit test),
however d3d10 very much does and requires RTZ for float to half
conversion. Moreover, apparently at least radeon gpus actually always
do RTZ when doing RT writes (and I'd suspect for shader image writes
as well). Hence it seems appropriate to hook up this rtz function to
the format instead. This will cause llvmpipe and softpipe to use rtz
rounding for clears with half float formats, and softpipe would use rtz
behavior for rt writes as well (llvmpipe has that hardcoded), not sure
if "real" hw drivers hit this function for much.
(For shader opcodes would still need to figure out what rounding to use
appropriately, but this is a question for another day.)
Note should probably unify with _mesa_float_to_float16_rtz. Unclear at
this point which one is better, so just restore previous function here.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4312>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4312>
2020-03-25 19:16:13 +00:00
Marek Vasut 9e78f17b74 etnaviv: Emit PE.ALPHA_COLOR_EXT* on GPUs with half-float support
At least GC880 (iMX6S), GC2000 (iMX6Q) blobs do not emit the
PE.ALPHA_COLOR_EXT0 and PE.ALPHA_COLOR_EXT1 into the command
stream. The GCnano (STM32MP1) is not affected by this change
either. This is because neither of these GPUs support the
half-float feature.

Emit PE.ALPHA_COLOR_EXT* in etnaviv only if half-float support
is present in the GPU. This fixes all of the currently failing
dEQPs in this group:
  dEQP-GLES2.functional.fragment_ops.blend.*

Fixes: 76adf041f2 ("etnaviv: fix blend color on newer GPUs")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4277>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4277>
2020-03-25 19:21:05 +01:00
Roland Scheidegger 4897e70ccd gallivm: disable rgtc/latc SNORM accellerated fetches
Unfortunately this appears to be bugged (it seems the piglit tests aren't
quite exhaustive enough). I'm almost certain it's the lerp
(lp_build_lerpdxta()) which doesn't handle signed numbers correctly, let's
disable for now.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4311>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4311>
2020-03-25 17:56:11 +00:00