Commit Graph

45073 Commits

Author SHA1 Message Date
Rhys Perry 898d7c1f49 nir: use a single canonical list of intrinsic indices
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
2020-11-26 17:50:38 +00:00
Danylo Piliaiev f7b2165b19 freedreno/a6xx: add support for dual-source blending
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7708>
2020-11-26 17:24:39 +00:00
Pierre-Eric Pelloux-Prayer 0b3bd7c516 radeonsi/gfx10: flush gfx cs on ngg -> legacy transition
with a sequence like this:

  glClear(STENCIL)
  glBeginTransformFeedback()
  ...
  glEndTransformFeedback()
  glClear(STENCIL)

The second clear sometimes may produce an unexpected result.

Calling si_flush_gfx_cs() when doing ngg -> legacy transition seems to be a
valid workaround (both for the synthetic reproducer and the real Blender bug).

Using flush flags or events (BOTTOM_OF_PIPE_TS, RESET_TO_LOWEST_VGT) didn't help.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2941
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7750>
2020-11-26 10:19:26 +01:00
Thong Thai f09456361c frontends/va/postproc: Convert destination when deinterlacing
When the VAAPI deinterlacing filter is chained with other VAAPI
post-processing filters, the image might get deinterlaced multiple
times, as the filters after the deinterlacing filter might still see an
interlaced buffer.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6803>
2020-11-25 20:08:15 +00:00
Thong Thai 49465babdb frontends/va/postproc: Use the actual image height when blitting
Updates the height of the blitting parameter to use the actual image
height instead of the buffer height, otherwise when scaling, garbage
lines are shown in the output.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6803>
2020-11-25 20:08:15 +00:00
Boris Brezillon ae27d7faae panfrost: Fix stride calculation for Z32_S8X24/X32_S8X24 formats
Z32_S8X24 variants are actually stored in 2 planes (one per component),
we have to adjust the bytes_per_pixel value accordingly.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25 17:04:26 +01:00
Boris Brezillon 00360cd5c8 panfrost: Calculate the row stride at resource creation time
So we don't have to calculate it again when we create a texture or
framebuffer descriptor.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25 17:04:20 +01:00
Boris Brezillon 4d0cd48fab panfrost: Enable MSAA on bifrost when deqp debug option is set
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25 16:25:12 +01:00
Boris Brezillon fc93eb7281 panfrost: Unconditionally align strides on 64 bytes for linear resources
If we don't do that we end up with DATA_INVALID faults when accessing
3D textures on Bifrost.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25 16:24:39 +01:00
Boris Brezillon de0b88223b panfrost: Stop forcing depth to nr_samples
Those are two different things, and the fact that Midgard use the same
offset in the texture descriptor for both things is just an
implementation detail.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25 16:21:10 +01:00
Alyssa Rosenzweig 76a428d03b panfrost: Account for sample count in tib offsets
I don't know if we have tests for MRT + MSAA but that would hit this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25 16:21:10 +01:00
Alyssa Rosenzweig 028de3beaf panfrost: Enable indirect uniform indexing
It works fine, and without it, the lowering bloats GLES2 shaders (by a
factor of 20x for one shader on t-rex!)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7615>
2020-11-25 13:15:05 +00:00
Erik Faye-Lund b8fb95ce01 Revert "gallium/hud: Use do_once for one-time init"
This reverts commit 2e81ec5e00.

Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7760>
2020-11-25 09:44:11 +00:00
Erik Faye-Lund 1f6e03c3bf Revert "gallium/trace: Fix helgrind complaint about one-time init"
This reverts commit 1aa055539f.

Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7760>
2020-11-25 09:44:11 +00:00
Erik Faye-Lund f57f040f13 Revert "tgsi: Fix helgrind complaint about one-time init"
This reverts commit d91fe7d1c6.

Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7760>
2020-11-25 09:44:11 +00:00
Mark Janes a1281f8a99 meson: add idep_mesautil to components using simple_mtx.h
If valgrind is installed, these components need to find valgrind.h.

Fixes: 53f7d539cd ("util: Add helgrind support for simple_mtx")
Closes: #3876
Acked-by: Rob Clark <robclark@freedesktop.org>
2020-11-24 18:13:07 -08:00
Erik Faye-Lund 37a706ad5d Revert "zink: initial implementation of shader keys"
This reverts commit 2be2a500a3.

Fixes: 2be2a500a3 ("zink: initial implementation of shader keys")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7754>
2020-11-24 21:51:34 +00:00
Erik Faye-Lund 06cb6c6063 Revert "zink: refcount the shader cache"
This reverts commit b9fdc21bba.

Fixes: b9fdc21bba ("zink: refcount the shader cache")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7754>
2020-11-24 21:51:34 +00:00
Erik Faye-Lund 01f04c7760 Revert "zink: move shader key structs into their own header"
This reverts commit ed7a5a5568.

Fixes: ed7a5a5568 ("zink: move shader key structs into their own header")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7754>
2020-11-24 21:51:34 +00:00
Erik Faye-Lund a4d03aa2b1 Revert "zink: fill in params for fs shader keys and flag shader for rebuild"
This reverts commit 9aa08221fa.

Fixes: 9aa08221fa ("zink: fill in params for fs shader keys and flag shader for rebuild")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7754>
2020-11-24 21:51:34 +00:00
Erik Faye-Lund 1a25b1b36e Revert "zink: put those shader keys to work fixing up fragment shaders"
This reverts commit eeff625ab3.

Fixes: eeff625ab3 ("zink: put those shader keys to work fixing up fragment shaders")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7754>
2020-11-24 21:51:34 +00:00
Erik Faye-Lund 469c59f8ea Revert "zink: update shader modules in gfx program when flagged dirty"
This reverts commit e96afeeb7b.

Fixes: e96afeeb7b ("zink: update shader modules in gfx program when flagged dirty")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7754>
2020-11-24 21:51:34 +00:00
Rob Clark d91fe7d1c6 tgsi: Fix helgrind complaint about one-time init
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7644>
2020-11-24 21:03:34 +00:00
Rob Clark 1aa055539f gallium/trace: Fix helgrind complaint about one-time init
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7644>
2020-11-24 21:03:34 +00:00
Rob Clark 2e81ec5e00 gallium/hud: Use do_once for one-time init
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7644>
2020-11-24 21:03:34 +00:00
Rob Clark 53f7d539cd util: Add helgrind support for simple_mtx
Annoyingly mtypes.h pulls in simple_mtx, which means we end up needing
to sprinkle a lot of idep_mesautil around.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3773
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7644>
2020-11-24 21:03:34 +00:00
Erik Faye-Lund c0286fc09b zink: fall back to util_blitter for scaled resolves
Vulkan can't scale while resolving using vkCmdResolveImage. For this we
need to use util_blitter.

The reason this wasn't a problem in the past, was that glBlitFramebuffer
always set pipe_blit_info::render_condition_enable, and we always used
that to bail out to util_blitter. When the latter changed, this broke.

Fixes: 19906022e2 ("zink: more accurately track supported blits")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7745>
2020-11-24 14:47:47 +00:00
Vinson Lee 19da9bd10d clover: Fix typo in comment.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7702>
2020-11-24 03:10:17 +00:00
Dave Airlie 105fc1c615 gallium: fix missing bit field in p_state.h
Marek pointed this out, not sure how we missed it.

Fixes: 3dc6da1ac1 ("gallium: add a non-multisample sample mask out behaviour flag.")

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7741>
2020-11-24 11:00:18 +10:00
Dave Airlie 87c70f1984 lavapipe: enable pipeline stats queries
These pass CTS, but I think are missing some stuff CTS doesn't test.

This is one of the base Vulkan 1.0 features and I'd like to support
it for conformance.

Cc: "20.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7705>
2020-11-24 06:50:41 +10:00
Dave Airlie 4263162839 lavapipe: fixup mipmap precsion bits
8 seems more correct, however it fixes a bunch of explict lod
tests but breaks some lod query tests.

Cc: "20.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7705>
2020-11-24 06:50:37 +10:00
Dave Airlie 2c0a078fdb llvmpipe: fix multisample lines.
This also needs another lines fix, but at least align the code
with tri and points

Cc: "20.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7705>
2020-11-24 06:50:34 +10:00
Dave Airlie d932720ff7 llvmpipe: fix multisample point rendering.
Fixes one case in
dEQP-VK.rasterization.primitives_multisample_4_bit.no_stipple.points

Cc: "20.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7705>
2020-11-24 06:50:31 +10:00
Dave Airlie 2ed54033de llvmpipe/setup: move point stats collection earlier.
You have to count the stats pre-culling here.

Just like dc261cdd42 did for lines.

VK-GL-CTS dEQP-VK.query_pool.statistics_query.clipping_primitives*point_list

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7705>
2020-11-24 06:50:28 +10:00
Dave Airlie f246456538 lavapipe: fix wsi acquire fences
Fixes:
dEQP-VK.wsi.xcb.swapchain.acquire.too_many

Cc: "20.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7705>
2020-11-24 06:50:24 +10:00
Dave Airlie 0d90c7cbc4 lavapipe: fixup device allocate + enable private data
I'd only half ported private memory support, finish the job.

Cc: "20.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7705>
2020-11-24 06:50:21 +10:00
Erik Faye-Lund 2ac396e2e5 zink: fix layered resolves
Until recently, we ended up using u_blitter here, because
info->render_condition_enable was always true here. But when we recently
fixed that overly broad check, this broke.

So let's fix layered-resolves, by actually checking if the resource has
layers respect them in that case, similar to what we do in blit_native.

Fixes: 19906022e2 ("zink: more accurately track supported blits")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3843
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7737>
2020-11-23 19:35:40 +00:00
Samuel Pitoiset cd59c22325 ac,radv: use better export formats for 8-bit when RB+ isn't allowed
When RB+ is enabled, R8_UINT/R8_SINT/R8_UNORM should use FP16_ABGR
for 2x exporting performance. Otherwise, use 32_R to remove useless
instructions needed for 16-bit compressed exports.

fossils-db (Vega10):
Totals from 8858 (6.35% of 139517) affected shaders:
SGPRs: 801248 -> 801210 (-0.00%); split: -0.01%, +0.00%
VGPRs: 596224 -> 596120 (-0.02%); split: -0.02%, +0.01%
CodeSize: 71462452 -> 71356684 (-0.15%); split: -0.15%, +0.00%
MaxWaves: 37097 -> 37105 (+0.02%); split: +0.04%, -0.02%
Instrs: 13963177 -> 13950809 (-0.09%); split: -0.09%, +0.00%
Cycles: 1476539360 -> 1476489996 (-0.00%); split: -0.00%, +0.00%
VMEM: 2363008 -> 2361349 (-0.07%); split: +0.04%, -0.11%
SMEM: 550362 -> 549977 (-0.07%); split: +0.01%, -0.08%
VClause: 245704 -> 245727 (+0.01%); split: -0.01%, +0.02%
SClause: 485161 -> 485104 (-0.01%); split: -0.01%, +0.00%
Copies: 1420034 -> 1422310 (+0.16%); split: -0.01%, +0.17%
Branches: 518710 -> 518705 (-0.00%)
PreSGPRs: 706633 -> 706584 (-0.01%)
PreVGPRs: 547163 -> 547007 (-0.03%); split: -0.03%, +0.01%

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7512>
2020-11-23 17:54:16 +00:00
Rob Clark a92f597b98 freedreno/ir3: Fix valgrind complaint about streamout state
The warning is a bit misleading about where it shows up.. it complains
about the shader key, due to shader key being calculated from (among
other things) stream_output state that had some uninitialized garbage
in the padding.

==84572== Uninitialised byte(s) found during client check request
==84572==    at 0x60548E8: blob_write_bytes (blob.c:163)
==84572==    by 0x6534EF7: compute_variant_key (ir3_disk_cache.c:111)
==84572==    by 0x6535143: ir3_disk_cache_retrieve (ir3_disk_cache.c:171)
==84572==    by 0x654D82F: create_variant (ir3_shader.c:251)
==84572==    by 0x654DA2B: ir3_shader_get_variant (ir3_shader.c:301)
==84572==    by 0x645B2CB: ir3_shader_variant (ir3_gallium.c:113)
==84572==    by 0x645B7EB: ir3_shader_create (ir3_gallium.c:219)
==84572==    by 0x645BAA7: ir3_shader_state_create (ir3_gallium.c:285)
==84572==    by 0x6506003: fd6_shader_state_create (fd6_program.c:1136)
==84572==    by 0x64676C7: assemble_tgsi (freedreno_program.c:105)
==84572==    by 0x64679DF: fd_prog_init (freedreno_program.c:188)
==84572==    by 0x6506157: fd6_prog_init (fd6_program.c:1172)
==84572==  Address 0xeff1588 is 424 bytes inside a block of size 480 alloc'd
==84572==    at 0x4866FA4: malloc (vg_replace_malloc.c:307)
==84572==    by 0x605D46F: ralloc_size (ralloc.c:133)
==84572==    by 0x605D52F: rzalloc_size (ralloc.c:166)
==84572==    by 0x654DFF7: ir3_shader_from_nir (ir3_shader.c:473)
==84572==    by 0x645B6C7: ir3_shader_create (ir3_gallium.c:182)
==84572==    by 0x645BAA7: ir3_shader_state_create (ir3_gallium.c:285)
==84572==    by 0x6506003: fd6_shader_state_create (fd6_program.c:1136)
==84572==    by 0x64676C7: assemble_tgsi (freedreno_program.c:105)
==84572==    by 0x64679DF: fd_prog_init (freedreno_program.c:188)
==84572==    by 0x6506157: fd6_prog_init (fd6_program.c:1172)
==84572==    by 0x64CB36F: fd6_context_create (fd6_context.c:154)
==84572==    by 0x59D93BB: st_api_create_context (st_manager.c:917)

Somehow this was showing up with dEQP-GLES31.info.vendor but not other
things.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7717>
2020-11-23 16:04:52 +00:00
Rob Clark 98d182fd46 freedreno/a6xx: Clear control mem at context create
We could be getting a recycled bo containing random garbage, which can
confuse check_vsc_overflow().

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7717>
2020-11-23 16:04:52 +00:00
Rob Clark 150a914a78 freedreno: Convert one last mtx_t -> simple_mtx_t
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7717>
2020-11-23 16:04:52 +00:00
Rob Clark 8651cfbbf0 freedreno: emit_marker() cleanup
1) Propagate the change to only emit markers in debug builds (and add
   the WFI that ensures they are synchronized with GPU.  We could
   consider dropping them entirely, since the GPU devcoredump support
   in newer kernels is more useful.  But it is still an occasionally
   useful fallback.

2) Use p_atomic_inc_return() to placate helgrind

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7717>
2020-11-23 16:04:52 +00:00
jzielins 79bd8edd87 swr: Pass draw start information to state update mechanism
This fixes crash in many workloads/tests

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7728>
2020-11-23 10:15:28 +00:00
Marek Olšák f7364c9fe0 radeonsi: don't allocate LDS for TCS inputs if it's not used
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7623>
2020-11-23 02:22:21 +00:00
Marek Olšák a4ba51e5be radeonsi: don't insert barrier between VS/TCS if all TCS inputs come from VGPRs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7623>
2020-11-23 02:22:21 +00:00
Marek Olšák 61fe66a2e4 radeonsi: pass VS->TCS IO via VGPRs if VS and TCS have the same thread count
It can only be done if a TCS input is accessed without indirect indexing and
with gl_InvocationID as the vertex index, and the number of VS and TCS threads
is the same.

This eliminates LDS stores and loads for VS->TCS IO, reducing shader lifetime
and LDS traffic.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7623>
2020-11-23 02:22:21 +00:00
Marek Olšák 6f13034265 ac/llvm: prepare for passing VS->TCS IO via VGPRs
- bump AC_MAX_ARGS
- add vertex_index_is_invoc_id parameter into load_tess_varyings

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7623>
2020-11-23 02:22:21 +00:00
Marek Olšák 98b2aacfbf radeonsi: remove unnecessary NULL checking in NIR tess functions
param_index is always checked for non-NULL later.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7623>
2020-11-23 02:22:21 +00:00
Marek Olšák 1190808eca radeonsi: if VS and TCS have the same number of threads, merge the conditonals
Instead of:
    if (VS) {
	VS;
    }
    if (TCS) {
	TCS;
    }

Do this if the number of threads is the same in VS and TCS:
    exec = enabled_threads;
    VS;
    TCS;

Skipping declare_vb_descriptor_input_sgprs is needed to match the VS return
values.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7623>
2020-11-23 02:22:21 +00:00
Marek Olšák 0aba174361 radeonsi: always return void from si_build_wrapper_function
It's the end of the shader, there are no return values.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7623>
2020-11-23 02:22:21 +00:00