Commit Graph

718 Commits

Author SHA1 Message Date
Marek Olšák 13b1424e96 radeonsi: change bind_history to track usage in each shader stage
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13400>
2021-10-19 16:53:29 +00:00
Marek Olšák 9f2a97e9df radeonsi: add an option to use CPU storage uploads for threaded context
It's only enabled for viewperf for now.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13400>
2021-10-19 16:53:29 +00:00
Marek Olšák 745ea99484 radeonsi: add SI_MAX_VRAM_MAP_SIZE definition
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13400>
2021-10-19 16:53:29 +00:00
Marek Olšák cbcdcd42fc radeonsi: enable shader culling on Navi1x consumer SKUs as well
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13393>
2021-10-18 18:08:59 +00:00
Marek Olšák 8cf802e8ef radeonsi: replace the GS prolog with a monolithic shader variant
It only exists because of the hw bug and is used very rarely.
Let's simplify it.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13393>
2021-10-18 18:08:59 +00:00
Marek Olšák 8c5a32b5fe radeonsi: split si_shader_key into ps and ge parts to minimize memcmp overhead
ps is for the pixel shader, while ge is for VS, TCS, TES, and GS.

si_shader_key: 68 bytes
si_shader_key_ge: 68 bytes
si_shader_key_ps: 28 bytes

The only notable change is that si_shader_select_with_key is changed
to a C++ template. Other changes are trivial.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13285>
2021-10-16 10:41:51 +00:00
Marek Olšák 385c9e1caf radeonsi: si_state_shaders.c -> cpp
We'll add some templates here.

Why is `extern "C"` not needed for exported functions?

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13285>
2021-10-16 10:41:51 +00:00
Marek Olšák 844f66bf38 radeonsi: remove GS fast launch
It regresses the first snx test because it adds CPU overhead, and there is
no way to work around it. The average effect on viewperf is 0, meaning that
a few cases improve, while a few others regress.

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13279>
2021-10-11 07:13:48 +00:00
Pierre-Eric Pelloux-Prayer f895dc04a5 radeonsi: add an async compute context
It'll be used exclusively for DRI_PRIME copies for now.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12763>
2021-10-07 09:21:05 +00:00
Pierre-Eric Pelloux-Prayer 46c95047bd radeonsi: implement si_sdma_copy_image for gfx7+
SDMA support was dropped in 1f31a21664 mainly because the
advantages of delegating some copy/clear operations to the
SDMA hw came with large drawbacks: CPU overhead due to the
sdma/gfx synchronization and hangs.

This commit restores SDMA support for all gfx7+ chips but
only for the image copy operations.

SDMA operations won't be intertwined with gfx operations
like before. Instead, a SDMA IB will contain a single copy
at a time and the synchronization will be handled by the
winsys (based on the used buffers).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12763>
2021-10-07 09:21:05 +00:00
Marek Olšák fb8f532ea1 radeonsi: implement draw_vertex_state for lower display list overhead
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13050>
2021-10-01 14:51:23 +00:00
Marek Olšák f00d3e2909 radeonsi: implement shader-based culling for lines
This helps some viewperf subtests.
Only view XY culling is done. Edgeflags are always disabled with lines.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13048>
2021-09-28 17:30:06 +00:00
Marek Olšák 4cb008719c radeonsi: fix a depth texturing performance regression on gfx6-7
Fixes: 0580d4c1 "radeonsi: enable HTILE with mipmapping on gfx9+"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5398

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13048>
2021-09-28 17:30:06 +00:00
Marek Olšák 73c82570cb radeonsi: move setting one GS shader key field out of si_shader_selector_key
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 99c5e03986 radeonsi: move setting most TCS shader key fields out of si_shader_selector_key
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák dba914de85 radeonsi: unroll loops in si_emit_spi_map using 33 C++ template instantiations
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 3ea3621b8d radeonsi: determine num_vbos_in_user_sgprs from template arguments in draw_vbo
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 7a20110ad3 radeonsi: precompute si_vgt_stages_key for NGG in si_shader
to remove this overhead from si_update_shaders

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 70220a1896 radeonsi: check flatshade and sprite_coord_enable for spi_map in bind_rs_state
it doesn't need to be in si_update_shaders

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 98d07e1928 radeonsi: make si_update_shaders a C++ template in si_state_draw.cpp
This reduces driver overhead.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 76fe6a0242 radeonsi: move PS inputs_read computation out of si_get_vs_key_outputs
to reduce overhead of si_update_shaders

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 6d1ab77a8f radeonsi: rewrite inlinable uniform states for shader keys in si_context
directly update the shader keys in si_context

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 0e64252912 radeonsi: add AMD_DEBUG=ib to print IBs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12812>
2021-09-10 23:32:03 +00:00
Marek Olšák 576f8394db radeonsi: remove the primitive discard compute shader
It doesn't always work, it's only useful on gfx9 and older, and it's too
complicated.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4011

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12812>
2021-09-10 23:32:03 +00:00
Marek Olšák 34a2c75310 radeonsi: enable DCC stores on gfx10.3 APUs for better performance
There is just one hw bug that we need to handle.

NO_DCC_FB was unused.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>
2021-09-01 07:51:30 +00:00
Marek Olšák 8c845d4cb4 radeonsi: rename DCC_WRITE -> ALLOW_DCC_STORE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>
2021-09-01 07:51:30 +00:00
Marek Olšák 6cb2f07e90 radeonsi: add si_print_current_ib function for debugging
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:58 +00:00
Marek Olšák 9fb77745f5 radeonsi: inline si_need_gfx_cs_space
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:58 +00:00
Marek Olšák b15c413947 radeonsi: simplify memory usage checking by merging vram and gtt counters
no change in behavior

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:58 +00:00
Marek Olšák c005b2cd4b radeonsi: move as_ls/es/ngg setting out of si_shader_selector_key
Do it when we bind shaders.

The advantages are:
- no need to memset the fields when any shader variant state is changed
  (e.g. culling on/off)
- no need to recompute the fields every time that happens

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:57 +00:00
Marek Olšák 08310f85ae radeonsi: remove instancing support from the prim discard compute shader
It's not important for workstation apps on Vega.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:57 +00:00
Marek Olšák 10a46226b1 gallium: remove vertices_per_patch, add pipe_context::set_patch_vertices
We would like draw-only display lists to have immutable draw info and
this is the only GL non-draw state in pipe_draw_info (not counting
view_mask).

It also allows removing some code from draw_vbo for tessellation.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12351>
2021-08-21 00:08:11 +00:00
Marek Olšák 6fc38d3b07 radeonsi: allow arbitrary swizzle modes for displayable DCC
by adding retile shader variants

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12430>
2021-08-20 14:28:36 +00:00
Marek Olšák 59fe704c45 gallium: simplify VRAM uploads by adding PIPE_RESOURCE_FLAG_DONT_MAP_DIRECTLY
When this flag is set, u_threaded_context will try not to map it directly
for better buffer placement. It's set by drivers when visible VRAM is too
small.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12257>
2021-08-09 11:58:48 +00:00
Marek Olšák 6546f28cc8 radeonsi: drop smoothing quality to 4xAA for better performance
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11754>
2021-07-08 18:37:41 +00:00
Marek Olšák b141e50282 radeonsi: add optimal multi draws and draw-level splitting for prim discard CS
This is a partial rewrite of some parts of the code.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11510>
2021-06-28 13:23:14 +00:00
Marek Olšák 9fa0d2cf35 radeonsi: change how the prim discard CS is enabled and splitting limits
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11510>
2021-06-28 13:23:14 +00:00
Marek Olšák 06da711350 radeonsi: remove the GDS variants of compute-based primitive discard
The GDS ordered append variant is unstable due to kernel and firmware bugs.
The unordered GDS variant isn't faster than the memory-based variant.

Only the memory-based variant is kept.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11510>
2021-06-28 13:23:14 +00:00
Marek Olšák a448074d05 radeonsi: don't compile TES and GS draw_vbo variants for the prim discard CS
This also fixes the incorrect emit_draw_packets template argument.
The condition should be inverted.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11102>
2021-06-21 19:03:29 +00:00
Marek Olšák 72a395b6de radeonsi: remove the chip_class dimension from the draw_vbo array
We don't use/initialize draw_vbo callbacks for other generations anymore.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11384>
2021-06-16 21:29:13 +00:00
Marek Olšák 24895f020a radeonsi: move a few functions from si_state_draw.cpp into si_gfx_cs.c
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11384>
2021-06-16 21:29:13 +00:00
Pierre-Eric Pelloux-Prayer 83250036be radeonsi/nir: add si_nir_is_output_const_if_tex_is_const
Determine if a given shader write the same constant value to its output
if a specific input texture is replaced by constant load.

It's done by checking if the store_output intrinsics only depends on
constant and a texture. If it's true, the given texture is replaced by
a constant load in cloned shader and this clone is optimized.

Then the output is checked (= is it constant or not).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10979>
2021-06-15 11:18:02 +02:00
Pierre-Eric Pelloux-Prayer b2bd9c5ccd radeonsi: add si_install_draw_wrapper
This allows to implement custom draw_vbo code-path without
touching si_draw_vbo.

As an example, skipped all draw calls with an odd new_draws
could be done like this:

   void mywrapper(...) {
   	   if (new_draws % 2)
   	      return;
   	   return sctx->real_draw_vbo(...);
   }

   if (some_condition_is_met)
      si_install_draw_wrapper(sctx, mywrapper);

Instead of having to add the "if ()" condition inside si_draw_vbo.

Note that a single wrapper may be installed so care must be taken
to not override an existing wrapper.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10979>
2021-06-15 10:19:04 +02:00
Pierre-Eric Pelloux-Prayer ff8a930cf7 radeonsi: add _once suffix to depth_cleared_level_mask
And add a new variable to disambiguate between "has been cleared once" and
"is cleared".

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10979>
2021-06-15 10:19:02 +02:00
Mike Blumenkrantz 74abd5df0e aux/tc: pass rebind count and rebind bitmask with replace_buffer_storage func
tc already calculates all the rebinding that needs to be done on a given
context, so (some of) this info can be passed on to drivers to enable
optimizations

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11245>
2021-06-14 20:42:47 +00:00
Marek Olšák 7844bdadac radeonsi: remove DFSM after we discovered how bad it is
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 9ba17ec21a radeonsi: generate buffer_id_unique for u_threaded_context
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 9dc7fff448 radeonsi: allow changing the NGG subgroup size to 256 but don't change it yet
Currently, 128 seems to have the best performance.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 712f74f590 radeonsi: remove 8 bytes from si_resource, turn other 4 bytes into padding
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 5af124c92c radeonsi: change si_resource::alignment to alignment_log2 for better packing
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00