Commit Graph

43 Commits

Author SHA1 Message Date
Connor Abbott 19c7b6f9d6 ir3/parser: Add ability to specify branchstack
This lets you test branching with computerator.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9463>
2021-03-10 16:23:04 +00:00
Connor Abbott a820eb537c ir3/parser: Support labels
This fixes the assembly for many scenarios where you want to use shader
replacement.

Note: unfortunately this leaks the identifier string created while
lexing, but I couldn't find a way to avoid leaking it except for
bringing in ralloc or something (which would be way more complicated).
The only other place doing something similar in mesa is the glsl parser,
which is using ralloc (actually a linear context).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9463>
2021-03-10 16:23:04 +00:00
Connor Abbott cd772d5687 ir3/parser: Fix parsing of "0.0" in @const line
Trying to specify a floating-point value in a @const line would result
in it getting interpreted as a FLUT value and failing parsing. Fix this
by making the various FLUT tokens include the surrounding parentheses.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9463>
2021-03-10 16:23:04 +00:00
Danylo Piliaiev 5e2cee57c5 freedreno/ir3/parser: add cat7 support
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8420>
2021-01-15 10:08:38 +00:00
Rob Clark 11cba228fd freedreno/ir3: Small resinfo disasm tweak
Add the 'type' field.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
2021-01-13 18:32:47 +00:00
Rob Clark 32a6a13052 freedreno/ir3/parser: Fix pre-a6xx stib parsing
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:53 +00:00
Rob Clark 859c92d7ee freedreno/ir3/parser: a6xx ldib/stib parsing
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:53 +00:00
Rob Clark b073dae5f0 freedreno/ir3: Fix ldg decoding/parsing
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:53 +00:00
Rob Clark a7e88787f6 freedreno/ir3/parser: Fixup stg parsing and add more tests
The offset can also be a register, in which case we need to shuffle
around the src order.  Add a few more test vectors to cover each
permutation (no offset, immed offset, gpr offset).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark d6fa130dda freedreno/ir3/parser: Add stgb support
Note that this conflicts with `stc` on a6xx+, so a good test that the
(new) disasm can handle both cases properly.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark eddfafae6a freedreno/ir3/parser: Add ldgb support
Gives us at least better coverage of pre-a6xx-bindless-ibo instructions.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark 1746c4d211 freedreno/ir3/parser: Fix pre-a6xx resinfo
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark 32539c1afc freedreno/ir3/parser: Fix atomic support
1) Handle a6xx bindless form
2) Fix shared vs global encoding

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark c5479d1d8d freedreno/ir3/parser: Add ldc support
Note that this shows up a slight encoding difference compared to test
vector extracted from blob deqp runs.  We think these should be dontcare
bits.  For now, add a note and replace the encoded value in the disasm
test.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark 101bf686ee freedreno/ir3: Disambiguate a6xx+ "bindless" instructions
Add a `.b`.. for the atomic instructions it should be `atomic.b.op` but
for now put the `.b` at the end to simplify life for the existing disasm

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark 99908c8d6d freedreno/ir3/parser: Add initial cat6 IBO instructions
Well, really just resinfo.. dealing with the different ldib/stib syntax
for a6xx+ vs earlier seems a bit too painful to deal with.  But resinfo
at least gives us some encoding test coverage of this group of instrs.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark f9c76fba9d freedreno/ir3/parser: Relative gpr/const can have modifiers too
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark 594b004e00 freedreno/ir3/parser: Add missing (sat) modifier
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark 1cdff35361 freedreno/ir3/parser: Fixup cat5 s2en instructions
Currently ir3 (incl emit_cat5()) expects the samp/tex src register to be
first.. which requires some fixup for the parser to match.

TODO we might want to revisit the src reg order when adding new instr
packing/encoding.  For now, lets just make the parser match the rest of
ir3.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark d35c79614e freedreno/ir3/parser: Fix dsxpp/dsypp encoding
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark e9b3234915 freedreno/ir3/parser: Fix cat6 store encoding
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark b90a1cf747 freedreno/ir3: Cleanup cat6 load instructions
There was some src2 vs src3 confusion, but since the syntax is like:

   ldl.f32 rDst, l[rBase+off], ncomp

it makes more sense to call the offset src2 and ncomp src3, than the
way we had it.  This is also easier to deal with for the ir3 assembly
parser.

Also, src_offset was only ever used by the assembly parser, and was
handled incorrectly in emit_cat6(), resulting that cat6 load instrs
would not work properly in (for ex) computerator.  Since we are
cleaning things up, drop src_offset and make the asm parser work in
the same way as the nir->ir3 frontend.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark 4e272003b1 freedreno/ir3: Clean up instruction creation
Convert everything remaining over to the version which takes # of
register (src + dst) and drop the ir3_instr_create2() version.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark d968f46997 freedreno/ir3/parser: Handle half-immed
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark 68be24dd6c freedreno/ir3/parser: cat1 updates (mova1, movmsk)
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark 647d7fc36d freedreno/ir3/parser: cat1 instructions can write relative GPR
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark 0b36044d4f freedreno/ir3/parser: Add new cat0 instructions
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark 2dc6458563 freedreno/ir3: Various cat0 updates
Update the IR and packer to handle the additional cat0 fields, in
prep for adding support in the assembler (in prep for adding round
trip parsing/packing test coverage).

We don't actually use these yet from the ir3 compiler, but at least
this is one less thing to worry about when we start trying to use
them.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Rob Clark eec183c159 freedreno/ir3/parser: Reset lexer when input changes
Otherwise, in case of parse errors, the lexer state can still contain
buffered input from the previous parse.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
2021-01-06 16:46:52 +00:00
Connor Abbott 32cb01a418 ir3/parser: Fix st{l,lw,g,p} and ld{l,lw,g,p} assembly
It seems the src_offset and dst_offset are unused for these, and the
offset is expected to be an immediate register. Also we forgot to add a
dummy dst for the store instructions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7386>
2020-11-19 17:55:03 +01:00
Connor Abbott e7471ce776 ir3: Support assembling & disassembling getspid/getwid
These aren't useful yet in the driver, but were useful for
reverse-engineering how private memory works.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7386>
2020-11-19 17:55:03 +01:00
Jonathan Marek a6291b1b11 freedreno/ir3: rework setup_{input,output} to make struct varyings work
Rework setup_{input,output} to be called during emit_intrinsic, in a way
which allows struct/array/matrix type varyings to work.

This allows turnip to pass dEQP-VK.glsl.linkage.varying.struct.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6181>
2020-09-01 15:10:47 +00:00
Eric Anholt 51acfe2230 freedreno/ir3: Simpify the immediates from an array of vec4 to array of dwords.
We usually had to split the idx/swiz out of the dword index anyway.  Note
that incidentally, immediates_size now increments in vec4s instad of
4*vec4s.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5990>
2020-08-05 23:06:55 +00:00
Eric Anholt e873c4da08 freedreno/ir3: Merge the redundant immediate_idx/immediates_count fields
I got tripped up again with the index vs count vs size fields and I'd
rather we didn't store the redundant info.  Settle on immediates_count as
"how many dwords of immediates we have"

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5990>
2020-08-05 23:06:55 +00:00
Rob Clark 0472ca2aa5 freedreno/ir3/parser: half-precision relative regs
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5957>
2020-07-18 09:14:13 -07:00
Rob Clark 00926954c3 freedreno/ir3: un-embed const_state
Make it an rzalloc'd ptr instead of embedded struct, so it can serve as
the mem ctx for immediates.  This gets rid of needing to explicitly free
the immediates, so one less thing to deal with when moving const_state.
(Also, after we move const_state to the shader variant, we won't need
one for binning pass variants)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Rob Clark 6039d083f7 freedreno/ir3: pass variant to ir3_create()
Prep to convert over to ralloc.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Rob Clark bd55533f5b freedreno/ir3: add accessor for const_state
We are going to want to move this back to the variant, and come up with
a different strategy for binning/nonbinning to share the same constant
layout, in order to implement shader-cache support.  (Since then we
can have a mix of dynamically compiled variants and cache hits, so there
is no good place to serialize the const-state.)

To reduce the churn as we re-arrange things, move direct access to the
const-state to a helper fxn.  This patch is the boring churny part.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Rob Clark 1e8808a4a0 freedreno/ir3: refactor out helper to compile shader from asm
Deduplicate a bit of hand-building of ir3_shader/_variant from
computerator and delay test.  This also removes the need for
external things to depend on generated ir3_parser header.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>
2020-06-19 13:16:57 +00:00
Eric Anholt 97b21110b8 freedreno/ir3: Sync some new changes from envytools.
With this I also brought in a few new control flow instruction disasm
tests that I'd made back when I wrote the disasm test, but which were too
far from correct to include until now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4857>
2020-05-04 11:14:46 -07:00
Kristian H. Kristensen c801228f0d freedreno/ir3: Reset lex line number when we start parsing
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Kristian H. Kristensen 34e7179dfa freedreno/ir3: Parse, but ignore @in, @out and @tex headers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Kristian H. Kristensen da467817e3 freedreno/ir3: Move ir3 assembler to backend compiler
For easier reuse.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4741>
2020-04-25 00:03:43 +00:00
Renamed from src/freedreno/computerator/ir3_parser.y (Browse further)