Commit Graph

83 Commits

Author SHA1 Message Date
Boris Brezillon 07f1df51aa pan/bi: s/t0/t1/ in bi_disasm_dest_add()
The ADD unit stores its result in t1 not t0.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7408>
2020-11-03 14:42:42 +00:00
Boris Brezillon f25850bf5f pan/bi: Use canonical name for FAU RAM sources
The uniform_constant field and BIFROST_SRC_CONST_{LO,HI} definitions
seem to imply that those only deal with embedded constants. Let's
rename them to reflect the fact that they actually encode accesses to
the Fast-Access-Uniform RAM.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7151>
2020-10-15 08:05:23 +02:00
Alyssa Rosenzweig 5fdd0c67f7 pan/bi: Fix message type printing
Lazy copy/pasting fail.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
2020-10-10 17:15:02 -04:00
Alyssa Rosenzweig 0f181f4eae pan/bi: Use canonical flow control enum
Merges multiple bits and adds some new combinations. The semantics are
the compiler are evidently wrong, we'll fix that next.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
2020-10-10 16:53:12 -04:00
Alyssa Rosenzweig d2328646b2 pan/bi: Use canonical term dependency
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
2020-10-10 16:53:11 -04:00
Alyssa Rosenzweig 2b9484c2c8 pan/bi: Use canonical term "message type"
These identify the type of message produced by a message-passing
instruction, rather than information about the clause per se.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
2020-10-10 16:53:11 -04:00
Alyssa Rosenzweig 800ee3d303 pan/bi: Print message types as strings
Even if we're not in verbose mode to match the canonical syntax.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
2020-10-10 16:53:11 -04:00
Alyssa Rosenzweig d2fac19999 pan/bi: Expand clause type to 5-bit
The upper bit is reserved.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
2020-10-10 16:53:10 -04:00
Alyssa Rosenzweig 785344e655 pan/bi: Use canonical name for staging registers
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
2020-10-10 16:53:10 -04:00
Alyssa Rosenzweig 4131bc3b0c pan/bi: Use canonical next_clause_prefetch
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
2020-10-10 16:53:10 -04:00
Alyssa Rosenzweig 6c1cabc288 pan/bi: Canonicalize terminate_discarded_threads
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
2020-10-10 16:53:09 -04:00
Alyssa Rosenzweig a5975883b9 pan/bi: Use canonical floating-point modes
First few pre-clause modifiers.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
2020-10-10 16:53:09 -04:00
Boris Brezillon ccb3d7d8be panfrost: bifrost: disassemble: Fix decoding of next_regs
next_regs decoding is wrong for the first and last instructions in a
clause:
- the first instruction has its destination encoded in the second reg
  block
- the last instruction has its destination encoded in the first reg block
  (things wrap around)

So, only the last instruction should pass first=true when decoding
next_regs. Fix that by passing the is_last_instruction information
instead of is_first_instruction to the disasm helpers.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7040>
2020-10-07 14:21:20 +02:00
Alyssa Rosenzweig c749803dbb pan/bi: Decode all 32-bit register modes
There's actually more than 16 of them, disambiguated by `r2 == r3` and
`first?` as conditions for another "fun" encoding. The extra space
allows for writing half-registers.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
2020-09-24 11:27:22 +00:00
Alyssa Rosenzweig bdb33f7529 pan/bi: Pass 'first' through disassembler
Required to decode the registers of the first instruction of a clause
correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
2020-09-24 11:27:22 +00:00
Alyssa Rosenzweig b392c07983 pan/bi: Disassemble PC-relative addresses
Apply whatever modifier we computed and symbolically work out the
behaviour of the hardware. This involves some pretty gnarly primitives
(e.g. 28-bit sign extensions) but seems to works ok.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
2020-09-24 11:27:22 +00:00
Alyssa Rosenzweig 08a9e5e3e8 pan/bi: Decode M values in disasm
This is rather complicated and mostly unused in real world code but
correct handling is required to disassemble branchy code.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
2020-09-24 11:27:22 +00:00
Alyssa Rosenzweig 9de34e16e0 pan/bi: Track M values of disassembled constants
We'll want to route these values from the clause itself to the source
dump in order to disassemble modified embedded constants.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
2020-09-24 11:27:21 +00:00
Alyssa Rosenzweig 43c6623c9e pan/bi: Inline dump_instr
Tuple dumping is trivial now that we autogenerate most of it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
2020-09-24 11:27:21 +00:00
Alyssa Rosenzweig 5ff3feab88 pan/bi: Annotate disassemble with format names
It's hard enough to keep this all straight as it is.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
2020-09-24 11:27:21 +00:00
Alyssa Rosenzweig ab5cc3e717 pan/bi: Annotate stop bit (canonically "Z-bit")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
2020-09-24 11:27:21 +00:00
Alyssa Rosenzweig 42ec4aa478 pan/bi: Use canonical syntax for special constants
Adds some missing constants relevant to compute shaders, etc.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 5a569d09f4 pan/bi: Use canonical syntax for registers/uniforms/imms
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig f8fc21059f pan/bi: Use new disassembler
We still use the clause/register decoding, but we now use the
metaprogrammed instruction decoding for the bulk of the operation.

We add a meson rule to call out to the Python generator script during
the build process.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig deab75250c pan/bi: Export dump_src
Needed in generated disassembler.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 05041811ce pan/bi: Add bi_disasm_dest_* helpers
Used to print the actual register/temporary for an instruction
destination given the port arrangement.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Eric Anholt 4c24c8239a panfrost: Fix remaining release-build warnings.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6462>
2020-08-28 22:45:08 +00:00
Alyssa Rosenzweig 14bb72c68b pan/bi: Separate disasm/compiler targets
Likewise.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6196>
2020-08-06 23:54:24 +00:00
Chris Forbes 1882b1e5a7 bifrost: Add support for nir_op_iabs
Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6098>
2020-07-28 15:40:00 +00:00
Timothy Arceri f35283d32e panfrost: add some missing fallthrough comments
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5766>
2020-07-08 03:04:03 +00:00
Alyssa Rosenzweig bc7397f376 pan/bi: Disassemble gl_PointCoord reads.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5290>
2020-06-03 22:58:46 +00:00
Alyssa Rosenzweig 4096be05af pan/bi: Add MUL.i32 to disasm
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig ec8665615f pan/bi: Disassemble pos=0xe
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
2020-05-29 20:34:55 +00:00
Vinson Lee df2c68ee4f pan/bi: Initialize struct fma_op_info member extended.
Fix warning reported by Coverity Scan.

Uninitialized scalar variable (UNINIT)
uninit_use: Using uninitialized value info. Field info.extended is
uninitialized.

Fixes: 8c79c710d4 ("pan/bi: Identify extended FMA opcodes")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5224>
2020-05-27 15:41:21 -07:00
Alyssa Rosenzweig 6650fa22c7 pan/bi: Add f16 TEXC.vtx op
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig fd0324a1ce pan/bi: Document compute_lod bit for compact tex
At least I assume this works this way.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig d31bc0e21c pan/bi: Also add compact vertex texturing
This implies lod=0.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig f514bdd106 pan/bi: Add TEX.vtx opcode for vertex texturing
Always has an LOD.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5232>
2020-05-27 16:49:44 -04:00
Alyssa Rosenzweig 2925e88996 pan/bi: Add SUB.v2i16/SUB.v4i8 opcodes to disasm
Like their ADD counterparts. Only on ADD.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890>
2020-05-04 18:45:15 +00:00
Alyssa Rosenzweig 20cb039457 pan/bi: Structify DISCARD
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig 5c03340fd1 pan/bi: Fix DISCARD ops in disasm
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883>
2020-05-04 11:08:15 -04:00
Alyssa Rosenzweig 814f2f1d33 pan/bi: Add CSEL.8 opcode
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig e23d191245 pan/bi: Add FCMP.GL.v2f16 on ADD opcode
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig b4f2d3a51c pan/bi: Add 64-bit int compares
Likewise.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig 52cc7165c6 pan/bi: Add some 8-bit compares
Not all but enough to see the pattern.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig 2f286eed2a pan/bi: Add CSEL.64 opcode
Chain twice for full 64-bit CSEL.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig 100edfe26d pan/bi: Add bool->float opcodes
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4789>
2020-04-28 17:17:48 +00:00
Alyssa Rosenzweig 1622478fbd pan/bi: Fix ADD.v4i8 opcode
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4766>
2020-04-27 14:52:26 +00:00
Alyssa Rosenzweig 76d1bb03d5 pan/bi: Include TEX_COMPACT f16 opcode
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00
Alyssa Rosenzweig cf7b952308 pan/bi: Disassemble f16 dual tex
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4671>
2020-04-22 01:01:17 +00:00