Commit Graph

19 Commits

Author SHA1 Message Date
Marek Olšák 1af99a28a0 radeonsi: merge CP DMA flags with internal compute flags
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9795>
2021-04-02 12:05:00 +00:00
Pierre-Eric Pelloux-Prayer aa9fe1e423 radeonsi: pass radeon_cmdbuf to emit_cache_flush
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8002>
2021-01-07 10:09:25 +01:00
Marek Olšák 1f31a21664 radeonsi: remove SDMA support
There are many issues with SDMA across many generations of hardware.
A recent example is that gfx10.3 suffers from random GPU hangs if
userspace uses SDMA.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7908>
2020-12-09 00:52:26 +00:00
Marek Olšák 3bd9db5be3 r300,r600,radeonsi: inline struct radeon_cmdbuf to remove dereferences
It's straightforward except that the amdgpu winsys had to be cleaned up
to allow this.

radeon_cmdbuf is inlined and optionally the winsys can save the pointer
to it. radeon_cmdbuf::priv points to the winsys cs structure.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7907>
2020-12-05 10:52:17 -05:00
Marek Olšák 7a0162905b radeonsi: update the DMA perf test
- don't test 2 waves/SA
- create the compute shader only once per subtest
- use only 1 TIME_ELAPSED query per subtest
- don't invalidate sL0 (it's not used)
- don't invalidate L2 for L2_LRU to test L2 throughput
- don't flush the CS after every run
- remove unused min/max computation

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7055>
2020-10-09 23:13:40 +00:00
Marek Olšák c9ccceff10 radeonsi: test uncached clear/copy buffer performance with compute shaders
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Marek Olšák 5acf99e81f radeonsi: compute perf tests - don't test 1 wave/SA limit, test no limit first
1 wave/SA is always slow and thus not useful

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935>
2020-05-15 22:12:35 +00:00
Pierre-Eric Pelloux-Prayer d7008fe46a radeonsi: switch to 3-spaces style
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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4319>
2020-03-30 11:05:52 +00:00
Marek Olšák 991328498b radeonsi: move SI and CIK+ SDMA code into 1 common function for cleanups
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
2020-01-06 15:38:35 -05:00
Marek Olšák 3c265c2586 radeonsi: rename dma_cs -> sdma_cs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
2020-01-06 15:38:33 -05:00
Nicolai Hähnle 0c6c6810bd radeonsi/gfx10: add si_context::emit_cache_flush
The introduction of GCR_CNTL makes cache flush handling on gfx10
sufficiently different that it makes sense to just use a separate
function.

Since emit_cache_flush is called quite early during context init,
we initialize the pointer explicitly in si_create_context.

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-07-03 15:51:12 -04:00
Marek Olšák 1d6e358c36 radeonsi: rename and re-document cache flush flags
SMEM and VMEM caches are L0 on gfx10.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-24 21:04:10 -04:00
Marek Olšák ec0956a194 radeonsi: don't test SDMA perf if SDMA is disabled/unsupported 2019-06-11 20:05:21 -04:00
Marek Olšák ccfcb9d818 ac: rename SI-CIK-VI to GFX6-GFX7-GFX8
Acked-by: Dave Airlie <airlied@redhat.com>

We already use GFX9 and I don't want us to have confusing naming
in the driver. GFXn naming is better from the driver perspective,
because it's the real version of the gfx portion of the hw. Also,
CIK means Bonaire-Kaveri-Kabini, it doesn't mean CI.

It shouldn't confuse our SDMA, UVD, VCE etc. code much. Those have
nothing to do with GFXn and they have their own version numbers.
2019-05-15 20:54:10 -04:00
Marek Olšák 66a82ec6f0 gallium: add writable_bitmask parameter into set_shader_buffers
to indicate write usage per buffer.
This is just a hint (it will be used by radeonsi).

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-04-04 19:28:52 -04:00
Marek Olšák d7a4fa91f0 radeonsi: allow si_cp_dma_clear_buffer to clear GDS from any IB
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-11-28 20:20:27 -05:00
Marek Olšák 203ef19f48 radeonsi: split si_copy_buffer
compute and SDMA will be added into it.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-09-10 15:19:56 -04:00
Marek Olšák 1119fe5c25 radeonsi: merge SI and CI dma_clear_buffer and remove the callback
also use assertions for the requirements that offset and size are a multiple
of 4.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-09-10 15:19:56 -04:00
Marek Olšák 93b8b987d0 radeonsi: add a thorough clear/copy_buffer benchmark 2018-08-29 15:31:42 -04:00