Commit Graph

131457 Commits

Author SHA1 Message Date
Vinson Lee c1b675bdd5 r600/sfn: Fix typos.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7649>
2020-11-19 16:39:36 -08:00
Ian Romanick 50fef61fa5 intel/fs: Add support for printing half-float immediate values
v2: Remove offensive, extraneous 0 in hex constant.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7650>
2020-11-19 21:23:53 +00:00
Ian Romanick 91f7e262e1 intel/fs: Silence unused parameter warning in filter_simd
src/intel/compiler/brw_fs.cpp: In function ‘bool filter_simd(const nir_instr*, const void*)’:
src/intel/compiler/brw_fs.cpp:8870:50: warning: unused parameter ‘_options’ [-Wunused-parameter]
 8870 | filter_simd(const nir_instr *instr, const void * _options)
      |                                     ~~~~~~~~~~~~~^~~~~~~~

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7650>
2020-11-19 21:23:53 +00:00
Ian Romanick 9f0907a4f5 intel/compiler: Delete redundant MAC declaration
It already appears about 20 lines earlier near MACH.

Trivial.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7650>
2020-11-19 21:23:53 +00:00
Ian Romanick 6edc2a3d40 intel/compiler: Rotate instructions ROR and ROL cannot have source modifiers
I checked the Bspec for both Gen11 and Gen12, and it appears that rotate
instructions cannot have source modifiers or saturate modifer.  Saturate
was already handled.

Fixes: 1e92e83856 ("intel/compiler: Emit ROR and ROL instruction")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7650>
2020-11-19 21:23:53 +00:00
Adam Jackson 366de8acc1 docs: Update Mesa GL enum allocations for EGL_MESA_platform_xcb
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7693>
2020-11-19 21:07:12 +00:00
Samuel Pitoiset c41cd7c324 radv/winsys: add missing Van Gogh and Dimgrey Cavefish in the null winsys
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7685>
2020-11-19 21:28:40 +01:00
Samuel Pitoiset 0c8cee39f4 radv/winsys: fill real PCIID for Sienna Cichlid and Navy Flounder
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7685>
2020-11-19 21:28:36 +01:00
Connor Abbott bac6cc586f ir3: Enable nir_lower_vars_to_scratch on a6xx
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7386>
2020-11-19 17:55:58 +01:00
Connor Abbott ea3db9f596 freedreno/a6xx: Implement private memory
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7386>
2020-11-19 17:55:58 +01:00
Connor Abbott 4d44461dd5 tu: Support private memory
Allocate enough space and then program the registers correctly. We
currently allocate scratch memory as part of the pipeline, because the
alternative of trying to share it across pipelines is a bit trickier due
to the need for the configs to exactly match whenever we reuse the same
buffer for different shaders.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7386>
2020-11-19 17:55:03 +01:00
Connor Abbott b525934f26 freedreno: Add per-device parameters for private memory
We have to allocate backing storage big enough to hold all the private
memory for all threads that can possibly be in flight, which means that
we have to start filling in some more model-specific information as the
sizes will be different for models with different core counts/ALU
counts.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7386>
2020-11-19 17:55:03 +01:00
Connor Abbott ae109ca83c ir3: Properly validate cat6 half-ness
Apparently this is all that's required to get loads & stores to work
with half registers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7386>
2020-11-19 17:55:03 +01:00
Connor Abbott 4970aa5577 ir3: Initial support for private memory
Add information that the driver will need to setup registers, and
implement support for load_scratch/store_scratch using private memory.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7386>
2020-11-19 17:55:03 +01:00
Connor Abbott 32cb01a418 ir3/parser: Fix st{l,lw,g,p} and ld{l,lw,g,p} assembly
It seems the src_offset and dst_offset are unused for these, and the
offset is expected to be an immediate register. Also we forgot to add a
dummy dst for the store instructions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7386>
2020-11-19 17:55:03 +01:00
Connor Abbott 504142ff75 ir3: Fix STP/LDP assembly
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7386>
2020-11-19 17:55:03 +01:00
Connor Abbott e7471ce776 ir3: Support assembling & disassembling getspid/getwid
These aren't useful yet in the driver, but were useful for
reverse-engineering how private memory works.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7386>
2020-11-19 17:55:03 +01:00
Connor Abbott 2cee8642ca ir3: Add more a6xx-specific cat6 opcodes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7386>
2020-11-19 17:55:03 +01:00
Connor Abbott c82d7be193 ir3: Expand cat6 a6xx opcode field
Turns out the low bit of pad3 is actually the high bit of the opcode.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7386>
2020-11-19 17:55:03 +01:00
Connor Abbott 92fe6fa0cc freedreno/a6xx: Document private memory registers
They seem to be broadly similar to the a3xx ones, albeit with some
things shuffled around and with different units, and the extra layout
mode bits.

We also document the FIRST_EXEC_OFFSET registers, so that we can start
properly setting them all to 0 in freedreno and turnip in later commits.
I discovered the compute one when playing with function support in the
blob CL driver, and added the other registers via analogy (the blob
Vulkan driver sets FIRST_EXEC_OFFSET and the shader VA together in one
packet for all stages, so it seems to really be in the same place for
all stages).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7386>
2020-11-19 17:55:03 +01:00
Connor Abbott 3d5bed03e1 freedreno/ci: Strip location from asserts
Let's not force everyone touching ir3.h to make random changes to the
reference output.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7386>
2020-11-19 17:55:03 +01:00
Matt Turner df29d0a111 glcpp: Handle bison-3.6 error message changes
In bison's commit 72c9fa4510eb (skeletons: use "end of file" instead of
"$end") in bison-3.6, '$end' was changed to 'end of file' in error
messages. Since our glcpp test cases contain the expected output text,
they rely on the particular messages printed by bison. The test case
084-unbalanced-parentheses fails when Mesa is built with bison-3.6 due
to this change.

To allow the test to pass on all supported versions of bison, we:

   1. Change '$end' -> 'end of file' in the .expected file, and
   2. Normalize the error generated by the test case with the same
      replacement

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3181
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7659>
2020-11-19 15:31:15 +00:00
Pierre-Eric Pelloux-Prayer 2be8cebd0b amdgpu_bo: make cache_entry a extensible array
Improves performance in SPECviewperf13 snx.
e.g.: test10 fps evolution: 270 -> 280.

"pahole radeonsi_dri.so -C amdgpu_winsys_bo" after:

struct amdgpu_winsys_bo {
	struct pb_buffer           base;                 /*     0    32 */
	union {
		struct {
			amdgpu_va_handle va_handle;      /*    32     8 */
			uint32_t   kms_handle;           /*    40     4 */
			int        map_count;            /*    44     4 */
		} real;                                  /*    32    16 */
		[...]
	} u;                                             /*    32    40 */
	/* --- cacheline 1 boundary (64 bytes) was 8 bytes ago --- */
	[...]
	struct pb_cache_entry      cache_entry[];        /*   144     0 */

	/* size: 144, cachelines: 3, members: 17 */
};

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7532>
2020-11-19 12:44:40 +00:00
Pierre-Eric Pelloux-Prayer 111a1b2e1c winsys/amdgpu: make RADEON_ALL_BOS a debug only feature
Improves performance in SPECviewperf13 snx.
e.g.: test10 fps evolution: 235 -> 270.

Extract from "pahole radeonsi_dri.so -C amdgpu_winsys_bo", before:

struct amdgpu_winsys_bo {
	struct pb_buffer           base;                 /*     0    32 */
	union {
		struct {
			struct pb_cache_entry cache_entry; /*    32    56 */

			/* XXX last struct has 4 bytes of padding */

			/* --- cacheline 1 boundary (64 bytes) was 24 bytes ago --- */
			amdgpu_va_handle va_handle;      /*    88     8 */
			int        map_count;            /*    96     4 */
			_Bool      use_reusable_pool;    /*   100     1 */

			/* XXX 3 bytes hole, try to pack */

			struct list_head global_list_item; /*   104    16 */
			uint32_t   kms_handle;           /*   120     4 */
		} real;
		[...]
	} u;                                             /*    32    96 */
	[...]
	/* size: 200, cachelines: 4, members: 15 */
};

After:

struct amdgpu_winsys_bo {
	struct pb_buffer           base;                 /*     0    32 */
	union {
		struct {
			struct pb_cache_entry cache_entry; /*    32    56 */

			/* XXX last struct has 4 bytes of padding */

			/* --- cacheline 1 boundary (64 bytes) was 24 bytes ago --- */
			amdgpu_va_handle va_handle;      /*    88     8 */
			int        map_count;            /*    96     4 */
			_Bool      use_reusable_pool;    /*   100     1 */

			/* XXX 3 bytes hole, try to pack */

			uint32_t   kms_handle;           /*   104     4 */
		} real;                                  /*    32    80 */
	} u;                                             /*    32    80 */
	/* --- cacheline 1 boundary (64 bytes) was 48 bytes ago --- */
	[...]
	/* size: 184, cachelines: 3, members: 15 */
};

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7532>
2020-11-19 12:44:40 +00:00
Rhys Perry 631e18d427 aco: create v_mad_u32_u24
fossil-db (Navi):
Totals from 849 (0.61% of 138791) affected shaders:
SGPRs: 38528 -> 38544 (+0.04%)
VGPRs: 39860 -> 39856 (-0.01%)
CodeSize: 2701880 -> 2702016 (+0.01%)
MaxWaves: 9148 -> 9150 (+0.02%)
Instrs: 509864 -> 509821 (-0.01%); split: -0.01%, +0.00%
Cycles: 3400124 -> 3399628 (-0.01%); split: -0.02%, +0.00%
VMEM: 262757 -> 262672 (-0.03%)
SMEM: 59710 -> 59704 (-0.01%)
Copies: 44461 -> 44466 (+0.01%)

fossil-db (Polaris):
Totals from 1487 (1.06% of 140385) affected shaders:
SGPRs: 54688 -> 55840 (+2.11%)
CodeSize: 2725608 -> 2725720 (+0.00%); split: -0.01%, +0.01%
Instrs: 521394 -> 517710 (-0.71%)
Cycles: 18474108 -> 18410964 (-0.34%)
VMEM: 436992 -> 431028 (-1.36%); split: +0.06%, -1.43%
SMEM: 124503 -> 122564 (-1.56%); split: +0.45%, -2.00%
VClause: 21972 -> 22015 (+0.20%); split: -0.12%, +0.31%
SClause: 14274 -> 14287 (+0.09%)
Copies: 44407 -> 44411 (+0.01%); split: -0.02%, +0.03%
PreSGPRs: 34318 -> 34321 (+0.01%); split: -0.00%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7639>
2020-11-19 12:36:17 +00:00
Samuel Iglesias Gonsálvez 1200f6da0b turnip: implement VK_KHR_depth_stencil_resolve support
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6884>
2020-11-19 09:43:11 +00:00
Michel Dänzer 13b2beb415 ac: Don't negate strstr return values in ac_query_gpu_info
strstr returns a pointer to the needle sub-string within the haystack
string if the latter contains the former, or NULL otherwise. So this
essentially always set info->is_pro_graphics = true, since probably no
marketing name ever contains all of these sub-strings.

Fixes: b635dff256 "ac: fix detection of Pro graphics"
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7675>
2020-11-19 09:17:21 +00:00
Iago Toral Quiroga 01e3f43007 v3dv: remove box check from texel buffer copy fragment shader
We are already ensuring that we only copy the appropriate pixel
rect via the scissor and viewport state, so there is no need to
do this check in the shader.

Using a stress test with 100 buffer to image copies of a single
layered image with 10 miplevels recorded into a command buffer and
measuring the time it gets to execute the command buffer we get
these results:

              | Execution Time |
    ----------|----------------|
    master    |     0.142s     |
    ----------|----------------|
    patch     |     0.071s     |

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7671>
2020-11-19 07:57:50 +01:00
Marek Olšák 745f0b8a31 winsys/amdgpu: move amdgpu_winsys_bo::lock for better packing
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7585>
2020-11-18 23:50:43 -05:00
Marek Olšák bccb9a7457 winsys/amdgpu: replace amdgpu_winsys_bo::initial_domain with pb_buffer::placement
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7585>
2020-11-18 23:50:41 -05:00
Marek Olšák 9c239aa638 winsys/amdgpu: replace amdgpu_winsys_bo::flags with pb_buffer::usage
Let's use the field so as not to waste memory.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7585>
2020-11-18 23:50:40 -05:00
Marek Olšák 37cdce0146 winsys/amdgpu: remove amdgpu_winsys_bo::sparse
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7585>
2020-11-18 23:50:38 -05:00
Marek Olšák a09bc2db18 winsys/amdgpu: remove amdgpu_winsys_bo::u::sparse::flags
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7585>
2020-11-18 23:50:36 -05:00
Kenneth Graunke 31290f9806 intel/fs: Fix sampler message headers on Gen11+ when using scratch
Icelake's sampler message header introduces a field in m0.3 bit 0
which controls whether the sampler state pointer should be relative
to bindless sampler state base address or dynamic state base address.

g0.3 bit 0 is part of the per-thread scratch space field.  On older
hardware, we were able to copy that along because the sampler ignored
bits 4:0.  Now, however, we need to mask them out.

Fixes various textureGatherOffsets piglit tests when forcing the FS
to run with 2048 bytes of per-thread scratch space (which is a
per-thread scratch space encoding of 1, meaning bit 0 will be set).

Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6735>
2020-11-18 23:32:09 +00:00
Kenneth Graunke 97ebb896af intel/compiler: Do interpolateAtOffset coordinate scaling in NIR
In our source languages, interpolateAtOffset() takes a floating point
offset in the range [-0.5, +0.5].  However, the hardware takes integer
valued offsets in the range [-8, 7], in units of 1/16th of a pixel.

So, we need to multiply and clamp the coordinates.  We were doing this
in the FS backend, but with the advent of IBC, I'd like to avoid doing
it twice.  This patch instead moves the lowering to NIR so we can reuse
it across both backends.

v2: Use nir_shader_instructions_pass (suggested by Eric Anholt).

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6193>
2020-11-18 23:26:53 +00:00
Nanley Chery 0d3b61dd7e iris: Stop quantizing the depth clear value
This function has a number of problems:

 1. It performs 24-bit quantization on a format which shouldn't be
    quantized at all (PIPE_FORMAT_Z32_FLOAT_S8X24_UINT).
 2. The algorithm seems to create a different pixel than HW would in the
    absence of this SW conversion. This can cause issues with depth
    testing.

Instead of adding more code to deal with these issues, delete the
quantization code.

This code originated from i965
(0ae9ce0f29) and helped to avoid a
regression in Lightsmark 2008. This change continues to avoid that
regression because any new clear value is now casted from double to
float before checking if the resource's clear value has changed.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3783
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7665>
2020-11-18 23:20:49 +00:00
Eric Anholt afa25cc49d ci: Bring freedreno into the "warnings clean release build" fold.
There are just a couple warnings left for turnip that point to real error
handling we should be adding.

Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7664>
2020-11-18 18:15:02 +00:00
Eric Anholt b537d425b3 freedreno: Suppress uninit var warnings from shader stage switch.
It seems we have enough branches that the compiler gets confused now, and
I can also suppress the warning by replacing "unreachable()" with
"return".  Unreachable is good for debugging, so just 0-init the values.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7664>
2020-11-18 18:15:02 +00:00
Eric Anholt 8ae38885d6 freedreno: Fix uninitialized var warning in afuc using unreachable().
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7664>
2020-11-18 18:15:02 +00:00
Eric Anholt 239bae7b94 freedreno: Fix warning about uninit size for the size==0 special case.
The size==0 query case would have just used uninitialized stack data for
sizing its BOs.

Fixes: 536ec9d7f5 ("freedreno: Refactor fd_resource_create_with_modifiers() into a helper")
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7664>
2020-11-18 18:15:02 +00:00
Eric Anholt 530a32bb95 freedreno/a6xx: Fix use of uninitialized img->level in the SSBO/image path.
I think enough things lined up that the uninitialized level in the buffer
paths would end effectively not being used (no ubwc, not tiling anyway),
but let's just zero-init it to be sure and quiet the compiler.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7664>
2020-11-18 18:15:02 +00:00
Eric Anholt 3390870cec freedreno: Fix release build warnings for asserted temp vars.
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7664>
2020-11-18 18:15:02 +00:00
Eric Anholt d1b2d15cb9 ci: Enable -Werror in more clover builds.
We've slowly been pushing -Werror through the set of CI builds, and it
looks like clover is clean at the moment.  Keep it that way.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7664>
2020-11-18 18:15:02 +00:00
Erik Faye-Lund 17ebce2f13 d3d12: transition the right planes
We need to start transitioning at plane 1 for stencil-only resources,
otherwise we end up transitioning the depth-plane instead.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3837
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7672>
2020-11-18 17:26:44 +00:00
Mike Blumenkrantz 968e360e47 zink: track custom border color samplers and verify against device limits
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7487>
2020-11-18 17:19:53 +00:00
Mike Blumenkrantz 4d498f5eac zink: handle arbitrary border colors using VK_EXT_custom_border_color
fixes mesa/mesa#3171

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7487>
2020-11-18 17:19:53 +00:00
Michel Zou f493fc5fa2 spirv: workaround setjmp/longjmp crash on MinGW
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7555>
2020-11-18 13:53:36 +00:00
Erik Faye-Lund 9e4f588318 llvmpipe: fix arith-test build on msvc
These functions aren't implemented using plain functions in the MSVC
runtime, so trying to take the function pointers directly cause
compilation errors.

Instead, let's call them from a wrapper-function, and use a
pre-processor define to replace the usage in this case. This makes these
build fine on MSVC.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7549>
2020-11-18 13:30:23 +00:00
Jesse Natalie 03cfc93ab5 winsys/d3d12: Use MakeWindowAssociation to remove DXGI's alt+enter handling
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7535>
2020-11-18 11:20:31 +01:00
Erik Faye-Lund 81adf12701 d3d12: also reject GDI-supporting pixel-formats
In theory, it's possible to request a GDI-supporting, double buffered
pixel-format, and we're not able to support this using the DXGI
swapchains. So let's return NULL here in that case as well.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7535>
2020-11-18 11:20:02 +01:00