Commit Graph

105556 Commits

Author SHA1 Message Date
Dylan Baker 59d494c1cc gallium/util: remove p_format.h from u_debug.h
Tested-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-30 14:32:52 -07:00
Dylan Baker 314777e86a gallium/util: move memory debug declarations into u_debug_gallium
Tested-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-30 14:32:52 -07:00
Dylan Baker 68074dfa0e gallium/util: move debug_print_tranfer_flags to u_debug_galilum
This also appears to be unused.

Tested-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-30 14:32:52 -07:00
Dylan Baker fc39dc9841 gallium/util: move debug_print_bind_flags to u_debug_gallium
This also appears to be unused.

Tested-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-30 14:32:52 -07:00
Dylan Baker e4f1fea821 gallium/util: move debug_print_usage_enum to the u_debug_gallium
This isn't used in mesa, maybe vmware uses this in a closed source state
tracker?

Tested-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-30 14:32:52 -07:00
Dylan Baker 078b3cdb34 gallium/util: start splitting u_debug into generic and gallium specific components
In order to pull u_debug into src/util we need to break the generically
useful bits from the bits that are tightly coupled to gallium.

Tested-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-30 14:32:52 -07:00
Dylan Baker 389d59c72a gallium: split u_prim_name out of u_debug.h
This allows us to pull u_prim.h out of u_debug.h

Tested-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-30 14:32:52 -07:00
Andre Heider 25a3ce97d5 gallium/hud: fix power sensor readings for amdgpu users
amdgpu doesn't use the INPUT but the AVERAGE subfeature:

$ sensors -u
amdgpu-pci-0100
Adapter: PCI adapter
power1:
  power1_average: 17.233
  power1_cap: 180.000

Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2018-10-30 16:30:32 -04:00
Rhys Perry 5172eb231d glsl_to_tgsi: don't create 64-bit integer MAD/FMA
TGSI has no I64MAD/U64MAD opcode.

Fixes: 278580729a ('st/glsl_to_tgsi: add support for 64-bit integers')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-30 20:27:12 +00:00
Marek Olšák 26cb93e229 radeonsi: add support for Raven2 (v2)
v2: fix enabling primitive binning

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-10-30 16:03:02 -04:00
Marek Olšák 0dea85928e radeonsi: clean up decompress flags in fast color clear 2018-10-30 16:03:02 -04:00
Marek Olšák 99835fff08 radeonsi/gfx9: set optimal OVERWRITE_COMBINER_WATERMARK 2018-10-30 16:03:02 -04:00
Marek Olšák 8ad12c8bec gallium: rework PIPE_HANDLE_USAGE_* flags
Only radeonsi uses them, so adjust them to match its needs.
2018-10-30 16:03:02 -04:00
Danylo Piliaiev 00fc56a68d anv: Disable dual source blending when shader doesn't support it on gen8+
Dual source blending behaviour is undefined when shader doesn't
have second color output.

 "If SRC1 is included in a src/dst blend factor and
  a DualSource RT Write message is not used, results
  are UNDEFINED. (This reflects the same restriction in DX APIs,
  where undefined results are produced if “o1” is not written
  by a PS – there are no default values defined)."

Dismissing fragment in such situation leads to a hang on gen8+
if depth test in enabled.

Since blending cannot be gracefully fixed in such case and the result
is undefined - blending is simply disabled.

v2 (Jason Ekstrand):
 - Apply the workaround to each individual entry
 - Emit a warning through debug_report

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-10-30 12:59:53 -07:00
Danylo Piliaiev eca4a6548d i965: Disable dual source blending when shader doesn't support it on gen8+
Dual source blending behaviour is undefined when shader doesn't
have second color output, dismissing fragment in such situation
leads to a hang on gen8+ if depth test in enabled.

Since blending cannot be gracefully fixed in such case and the result
is undefined - blending is simply disabled.

v2 (Kenneth Graunke):
 - Listen to BRW_NEW_FS_PROG_DATA in 3DSTATE_PS_BLEND
 - Also whack BLEND_STATE[] to keep the two in sync, since we're not
   sure exactly which copy of the redundant info the hardware will use.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107088
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-10-30 12:59:53 -07:00
Kenneth Graunke 337a808062 i965: Respect GL_TEXTURE_SRGB_DECODE_EXT in GenerateMipmaps()
Apparently, we're supposed to look at the texture object's built-in
sampler object's sRGB decode setting in order to decide whether to
decode/downsample/re-encode, or simply downsample as-is.  Previously,
I had always done the decoding/encoding.

Fixes SKQP's Skia_Unit_Tests.SRGBMipMaps test.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2018-10-30 12:59:53 -07:00
Andrii Simiklit e4e0fd5ffe
i965/batch: don't ignore the 'brw_new_batch' call for a 'new batch'
If we restore the 'new batch' using 'intel_batchbuffer_reset_to_saved'
function we must restore the default state of the batch using
'brw_new_batch' function because the 'intel_batchbuffer_flush'
function will not do it for the 'new batch' again.
At least the following fields of the batch
'state_base_address_emitted','aperture_space', 'state_used'
should be restored to default values to avoid:
1. the aperture_space overflow
2. the missed STATE_BASE_ADDRESS commad in the batch
3. the memory overconsumption of the 'statebuffer'
   due to uncleared 'state_used' field.
etc.

v2: merge with new commits, changes was minimized, added the 'fixes' tag
v3: added in to patch series

Fixes: 3faf56ffbd "intel: Add an interface for saving/restoring
                     the batchbuffer state."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107626
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-10-30 12:09:17 -07:00
Andrii Simiklit a9031bf9b5
i965/batch: avoid reverting batch buffer if saved state is an empty
There's no point reverting to the last saved point if that save point is
the empty batch, we will just repeat ourselves.

CC: Chris Wilson <chris@chris-wilson.co.uk>
Fixes: 3faf56ffbd "intel: Add an interface for saving/restoring
                     the batchbuffer state."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107626
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-10-30 12:09:09 -07:00
Eric Engestrom ea738a91de egl: add messages to a few assert() and turn a couple into unreachable()
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-10-30 18:10:59 +00:00
Eric Engestrom d0d6ec549d util: s/0/NULL/ for pointer
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-10-30 18:10:59 +00:00
Eric Engestrom 5c64847322 i965: add missing case to fix -Wswitch
While at it, turn "unreachable" assert() into unreachable().

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-10-30 18:10:59 +00:00
Eric Engestrom 2894e278cf mesa: fix struct/class mismatch
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-10-30 18:10:59 +00:00
Eric Engestrom 6000895e2d mesa: fix memcpy() and memset(0) of non-trivial structs
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-10-30 18:10:59 +00:00
Eric Engestrom 69eb6d58e8 nouveau: remove unused class member
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2018-10-30 18:10:59 +00:00
Eric Engestrom 6f9309d5d4 scons: drop unused HAVE_STDINT_H macro
This was required back when MSVC didn't support C99 and was missing this
header, but since MSVC 2013 (or maybe earlier?) this isn't it does and
this code isn't doing anything anymore.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-10-30 18:10:59 +00:00
Eric Engestrom a18d726621 aub_viewer: show vertex buffer pitch
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-10-30 18:10:59 +00:00
Eric Engestrom 0bbee28a3b meson: add note about intel tools build options
Fixes: ea83a1d304 "intel: tools: import ImGui"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-10-30 18:10:59 +00:00
Eric Engestrom 4a266d01a7 vl: drop left-over variable
Fixes: 6ccc435e7a "pipe-loader: move dup(fd) within pipe_loader_drm_probe_fd"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-10-30 18:10:59 +00:00
Eric Anholt 68657d76b9 vc4: Fix unused variable warning.
Fixes: bb84fa146f ("util: use C99 declaration in the for-loop hash_table_foreach() macro")
2018-10-30 10:46:52 -07:00
Eric Anholt cc54e1acf9 v3d: Use nir_remove_unused_io_vars to handle binner shader output DCE
We were doing this late after nir_lower_io, but we can just reuse the core
code.  By doing it at this stage, we won't even set up the VS attributes
as inputs, reducing our VPM size.
2018-10-30 10:46:52 -07:00
Eric Anholt c152c79d5e v3d: Only add output slot tracking for the current varying slot.
We always emit 4 slots per slot because things like color output and
position processing in the epilogue will potentially look up more values
than the variable declaration had.  However, when we get a .location_frac
!= 0, we don't want to overwrite components of the following
.driver_location.
2018-10-30 10:46:52 -07:00
Eric Anholt 17c8198952 v3d: Use nir_lower_io_to_scalar_early to DCE unused VS input components.
This lets us trim unused trailing components in the vertex attributes,
reducing the size of our VPM allocations.
2018-10-30 10:46:52 -07:00
Eric Anholt fc85f7cfdc v3d: Don't rely on sorting input vars for VPM read setup.
For supporting scalar VPM i/o at the NIR level, we need to do a pass over
the vars to figure out how big each attribute is after DCE.  Once we've
done that, we can just walk over c->vattr_sizes[] instead of bothering
with vars.
2018-10-30 10:46:52 -07:00
Eric Anholt cc78676030 v3d: Split out NIR input setup between FS and VPM.
They don't share much code, and I'm about to rewrite the remaining shared
code for the VPM case.
2018-10-30 10:46:52 -07:00
Eric Anholt 8265dfaa87 nir: Allow using nir_lower_io_to_scalar_early on VS input vars.
This will be used on V3D to cut down the size of the VS inputs in the VPM
(memory area for sharing data between shader stages).

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-10-30 10:46:52 -07:00
Jason Ekstrand f48b742289 anv: Bump the advertised patch version to 90
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-10-30 11:43:43 -05:00
Emil Velikov 29283921b7 m4: add Werror when checking for compiler flags
Seemingly that at some point clang started accepting _any_ flags,
whereas previously it would error out.

These days, you can give it -Whamsandwich and it will succeed, while
at the same time throwing an annoying warning.

Add -Werror so that everything gets flagged and set accordingly.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108082
Cc: Vinson Lee <vlee@freedesktop.org>
Repored-by: Vinson Lee <vlee@freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-10-30 16:41:05 +00:00
Dylan Baker a8bed38b54 docs/calendar: Add 18.3 plan and expand 18.2
Emil will be helping out with 18.3, while Juan finalises 18.2

v2: [Emil] add Emil for 18.3, fix typos

CC: Emil Velikov <emil.velikov@collabora.com>
CC: Juan A. Romero Suarez <jasuarez@igalia.com>
Cc: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
2018-10-30 16:35:58 +00:00
Emil Velikov c210d0c3b7 vulkan/wsi: use the drmGetDevice2() API
On older kernels, the drmGetDevice() call will wake up all the GPUs
on the system, while fetching the PCI revision.

Use the 2 version of the API and pass flags == 0, so we don't fetch the
device PCI revision, since we don't need that information.

Fixes: baa38c144f ("vulkan/wsi: Use VK_EXT_pci_bus_info for DRM fd matching")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-10-30 16:35:50 +00:00
Jason Ekstrand a45b6fb452 spirv: Pass SSA values through functions
Previously, we would create temporary variables and fill them out.
Instead, we create as many function parameters as we need and pass them
through as SSA defs.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2018-10-30 11:22:44 -05:00
Mauro Rossi bfe0e32913 android: i965/tiled_memcpy: fix build for x86 generic target
x86 32 bit generic target does not enable ARCH_X86_HAVE_SSE4_1
for this reason all Android library modules using SSE4_1 in mesa
are built conditionally to ARCH_X86_HAVE_SSE4_1

The same approach is now applied to libmesa_intel_tiled_memcpy_sse41
in order to avoid the following building errors:

external/mesa/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c:574:15:
error: initializing '__m128i' (vector of 2 'long long' values) with an expression of incompatible type 'int'
      __m128i val = _mm_stream_load_si128((__m128i *)src);
              ^     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
external/mesa/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c:578:15:
error: initializing '__m128i' (vector of 2 'long long' values) with an expression of incompatible type 'int'
      __m128i val0 = _mm_stream_load_si128(((__m128i *)src) + 0);
              ^      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
external/mesa/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c:579:15:
error: initializing '__m128i' (vector of 2 'long long' values) with an expression of incompatible type 'int'
      __m128i val1 = _mm_stream_load_si128(((__m128i *)src) + 1);
              ^      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
external/mesa/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c:580:15:
error: initializing '__m128i' (vector of 2 'long long' values) with an expression of incompatible type 'int'
      __m128i val2 = _mm_stream_load_si128(((__m128i *)src) + 2);
              ^      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
external/mesa/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c:581:15: error: initializing '__m128i' (vector of 2 'long long' values) with an expression of incompatible type 'int'
      __m128i val3 = _mm_stream_load_si128(((__m128i *)src) + 3);
              ^      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5 errors generated.

Fixes: 11b1afdc92 ("i965/tiled_memcpy: inline movntdqa loads in tiled_to_linear")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2018-10-30 14:45:16 +02:00
Toni Lönnberg 50e952840f intel: tools: Add handling for video pipe
Preliminary work for adding handling of different pipes to gen_decoder. We
need to be able to distinguish between different pipes in order to decode
the packets correctly due to opcode re-use.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-10-30 12:43:00 +00:00
Toni Lönnberg d5a938c58d intel/decoder: Use 'DWord Length' and 'bias' fields for packet length.
Use the 'DWord Length' and 'bias' fields from the instruction definition to
parse the packet length from the command stream when possible. The hardcoded
mechanism is used whenever an instruction doesn't have this field.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-10-30 12:43:00 +00:00
Marek Olšák a09cbaffbf mesa: expose EXT_texture_compression_s3tc on GLES
The spec was modified to support GLES.

Tested-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2018-10-30 13:31:00 +01:00
Michał Janiszewski 2734baa9e2 mesa: Add missing include guards
Signed-off-by: Michał Janiszewski <janisozaur+signed@gmail.com>

Reviewed-by: Brian Paul <brianp@vmware.com>
2018-10-30 06:19:10 -06:00
Michał Janiszewski ec994ca0fc glx: Add missing include guards
Signed-off-by: Michał Janiszewski <janisozaur+signed@gmail.com>

Reviewed-by: Brian Paul <brianp@vmware.com>
2018-10-30 06:19:10 -06:00
Michał Janiszewski 8ebd7039c4 svga: Add missing include guards
Signed-off-by: Michał Janiszewski <janisozaur+signed@gmail.com>

Reviewed-by: Brian Paul <brianp@vmware.com>
2018-10-30 06:19:09 -06:00
Michał Janiszewski 0654450911 glsl: Add missing include guards
Signed-off-by: Michał Janiszewski <janisozaur+signed@gmail.com>

Reviewed-by: Brian Paul <brianp@vmware.com>
2018-10-30 06:19:09 -06:00
Eric Engestrom fddf384d1d intel/batch-decoder: remove never-used function
This function was there when the file was introduced in commit
38f10d5a03 "intel: tools: add aubinator viewer", but was
never actually used.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-10-30 10:59:43 +00:00
Eric Engestrom e9fb81375a st/dri: remove leftover local variable
Left over from the cleanup in 6ccc435e7a "pipe-loader: move dup(fd)
within pipe_loader_drm_probe_fd"

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-10-30 10:20:58 +00:00