Commit Graph

141341 Commits

Author SHA1 Message Date
Mike Blumenkrantz 5341b985e4 zink: use fake buffer barriers for descriptors
GL requires explicit glMemoryBarrier calls for shader synchronization
and only calls that map/copy buffers get implicit sync, so we don't actually
need barriers for any of these cases, only the state needs to be updated

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11393>
2021-06-17 01:18:39 +00:00
Mike Blumenkrantz 3c2f343618 zink: check actual mem props to determine if resource object is coherent
this was correct for what it has been used for until now, but it will no
longer be correct going forward

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11397>
2021-06-17 01:07:35 +00:00
Mike Blumenkrantz b1b6aecf9d zink: key alloc cache on heap index, not heap flags
this is a bit more sane

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11397>
2021-06-17 01:07:35 +00:00
Mike Blumenkrantz c56a100494 zink: avoid caching visible vram allocations
the visible vram heap is potentially going to be limited in size, so avoid
caching these allocations since that locks them to a given allocation size

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11397>
2021-06-17 01:07:35 +00:00
Mike Blumenkrantz 18b71c0da3 zink: change a bunch of sparse buffer resource checks to host-visible checks
(sparse buffer) is a subset of !host-visible, and !host-visible is actually the
more correct check to be using

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11397>
2021-06-17 01:07:35 +00:00
Mike Blumenkrantz 5fee58bf59 zink: collapse host_visible and non-coherent alignment alloc cases
* buffers can use normal mem prop checking to determine host_visible setting
* sparse buffers are never coherent, so this case can be dropped from the conditional

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11397>
2021-06-17 01:07:35 +00:00
Martin Krastev eb272f6571 compiler/glsl: Use mutex lock while freeing up mem_ctx
builtin_builder::~builtin_builder() and builtin_builder::release()
are running into race condition. This leads lightsmark to crash at
the end because both calls ralloc_free which mutates the arguments state

This patch fixes lightsmark2008 crash

Fixes: e4da8b9c33 ("mesa/compiler: rework tear down of builtin/types")

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11385>
2021-06-16 23:14:23 +00:00
Mike Blumenkrantz 4a407e0ad8 zink: mark some functions inline
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11429>
2021-06-16 23:02:55 +00:00
Connor Abbott e19f112435 ir3/ra: Fix array parallelcopy confusion
With array registers, there are two num's we care about:

1. The base num that the whole array starts at (->array.base)
2. The num that the instruction uses, plus possibly an indirect offset
   (->num or ->array.offset)

For parallel copies we always copy the whole array, so (2) is irrelevant
here. For phis and parallel copies inserted for phis, we used
assign_reg() which assigned ->array.base, but we forgot about this when
constructing our own parallel copies for live range splitting, just
setting ->num instead. The parallel copy lowering was also inconsistent
here, using ra_reg_get_num() (which looks at ->array.base for arrays)
for sources but looking at ->num directly for destinations. This makes
everything use ->array.base consistently.

While we're here, make sure to remove IR3_REG_SSA from liveout copies to
make sure printing works correctly.

Fixes: 0ffcb19 ("ir3: Rewrite register allocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11422>
2021-06-16 22:45:13 +00:00
Connor Abbott 2c21dab36e ir3: Improve printing of array parallelcopies/phis
Normally something with IR3_REG_ARRAY doesn't have a register assigned,
but we keep IR3_REG_ARRAY for parallel copies after RA because we need
to know the appropriate size. We want to see the register assigned for
these when printing the RA result before parallel copies are lowered.
The register is in ->array.base in this case, so initialize it to
INVALID_REG and print ->array.base if it's been assigned to something,
similar to ->num in the normal case.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11422>
2021-06-16 22:45:13 +00:00
Marek Olšák d0d2108425 shader_enums: change VERT_BIT back to the 32-bit shift
This reverts 0e2566a8. The warning is fixed differently.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10993>
2021-06-16 21:45:57 +00:00
Marek Olšák 45cbb08848 gallium/pb: change alignment to 32 bits
This partially reverts 4a3f0444. The warning is fixed differently.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10993>
2021-06-16 21:45:57 +00:00
Marek Olšák 97a5753812 radeonsi: remove -Wstrict-overflow=0 since it doesn't seem to be needed
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11384>
2021-06-16 21:29:13 +00:00
Marek Olšák 72a395b6de radeonsi: remove the chip_class dimension from the draw_vbo array
We don't use/initialize draw_vbo callbacks for other generations anymore.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11384>
2021-06-16 21:29:13 +00:00
Marek Olšák 1e4d91355f radeonsi: compile si_state_draw.cpp for each gfx generation separately
It makes compilating faster.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11384>
2021-06-16 21:29:13 +00:00
Marek Olšák 24895f020a radeonsi: move a few functions from si_state_draw.cpp into si_gfx_cs.c
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11384>
2021-06-16 21:29:13 +00:00
Yiwei Zhang b8ce8530a0 venus: remove workarounds for multi-planar format interop
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11282>
2021-06-16 20:31:32 +00:00
Yiwei Zhang 357e7ae30b anv: fix build errors after commit 8b7ff78
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11373>
2021-06-16 19:55:48 +00:00
Yiwei Zhang ec1968dcc9 radv: fix build errors after commit 8b7ff784
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11373>
2021-06-16 19:55:48 +00:00
Mike Blumenkrantz 25972df4b7 zink: ci updates
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11391>
2021-06-16 19:45:25 +00:00
Mike Blumenkrantz d0833f611a zink: support more RGBX formats
the base formats are supported, so these should fall into place naturally

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11391>
2021-06-16 19:45:25 +00:00
Mike Blumenkrantz 1e86cdd8b7 zink: also nope out of any dst alpha blends for rgbx formats
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11391>
2021-06-16 19:45:25 +00:00
Mike Blumenkrantz f091392c0d zink: smash dstAlphaBlendFactor to ZERO for RGBX attachments
this is a no-op

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11391>
2021-06-16 19:45:25 +00:00
Mike Blumenkrantz 2f2976e9e1 zink: add a more direct check for rgbx formats in create_sampler_view hook
really the point of this is to clamp void channels for any permutation of rgbx
where all channels are the same (e.g., both rgbx8 and rgbx16), so the previous
helper isn't inclusive enough

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11391>
2021-06-16 19:45:25 +00:00
Mike Blumenkrantz a3a6611e96 util/queue: add a global data pointer for the queue object
this better enables object-specific (e.g., context) queues where the owner
of the queue will always be needed and various pointers will be passed in
for tasks

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11312>
2021-06-16 15:10:09 -04:00
Marek Olšák d305a8fc5f radeonsi: set desc[3] of all buffer descriptors at context creation
instead of at bind time. When we unbind, we shouldn't memset the last
element.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11340>
2021-06-16 17:14:49 +00:00
Marek Olšák 42801731b8 radeonsi: remove no-op unref in si_set_constant_buffer
buffer is already NULL here

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11340>
2021-06-16 17:14:49 +00:00
Marek Olšák a29ff4c67e radeonsi: restructure si_set_sampler_views for faster unbinding trailing slots
si_set_sampler_view updates only one slot. This rewrites it to update
multiple slots.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11340>
2021-06-16 17:14:49 +00:00
Marek Olšák 10cf7b3031 radeonsi: don't clear register fields in si_set_mutable_tex_desc_fields
They are always initialized to 0.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11340>
2021-06-16 17:14:49 +00:00
Marek Olšák 810e84387b radeonsi: use the restrict keyword to set sampler view descriptors faster
All places must set restrict for the same pointer.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11340>
2021-06-16 17:14:49 +00:00
Marek Olšák 53853d0b27 radeonsi: check is_buffer once instead of 4 times in si_set_sampler_view_desc
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11340>
2021-06-16 17:14:49 +00:00
Erik Faye-Lund a8fc38b276 zink: do not check buffer-format for usage-bits
Buffers are created without a format in Vulkan, and we always pass in
R8_UNORM for them in Gallium. It's the view-formats we should have
checked, if anything.

But that's orthogonal to this. We shoudn't keep checking R8_UNORM
capabilities for buffers, all it's going to do is trigger asserts.

Fixes: 00dc0036b ("zink: flatten out buffer creation usage flags codepath")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11416>
2021-06-16 15:36:59 +00:00
Erik Faye-Lund 662dc70002 zink: drop repeated usage-bit
We already set this bit unconditionally right before, no point in
repeating it.

Fixes: 00dc0036b ("zink: flatten out buffer creation usage flags codepath")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11416>
2021-06-16 15:36:59 +00:00
Erik Faye-Lund c35fc7ad2c zink: remove unused function
There's no call-sites to this function, so let's drop it.

Fixes: e4e20556d6 ("zink: switch to memory barriers instead of actual buffer barriers")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11421>
2021-06-16 15:15:14 +00:00
Erik Faye-Lund 0360533d6c zink: fixup signedness of subtraction
I'm not even going to pretend that I grok this code, but since we take
the abs value, it's pretty obvious that we meant to use a signed value
here. So let's cast the two operands to int before we subtract.

This was noticed by the following clang warning:

---8<---
../src/gallium/drivers/zink/zink_context.c:3284:14: warning: taking the
absolute value of unsigned type 'unsigned int' has no effect
[-Wabsolute-value]
      last = abs(reads - writes) > UINT32_MAX / 2 ? MIN2(reads, writes) : MAX2(reads, writes);
             ^
---8<---

Fixes: 0c1fe392e8 ("zink: implement a tc is_resource_busy hook")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11421>
2021-06-16 15:15:14 +00:00
Mike Blumenkrantz 806251c72d zink: move queue init to screen creation
this is a race condition

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11398>
2021-06-16 15:03:22 +00:00
Mike Blumenkrantz 0cfcc0602b zink: set subdata hook as PIPE_MAP_ONCE
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11401>
2021-06-16 14:45:01 +00:00
Mike Blumenkrantz 3e66808a82 zink: update pipe_screen::num_contexts
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11394>
2021-06-16 14:31:41 +00:00
Mike Blumenkrantz 24342e499b anv: fix dynamic primitive topology for tess
this needs to use the pre-converted topology using tess state patch control points

Fixes: f6fa4a8000 ("anv: add support for dynamic primitive topology change")

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11332>
2021-06-16 13:45:15 +00:00
Erik Faye-Lund bcd82a90c2 zink: correct type of flags to flush
This type is unsigned in the prototype, so this produces a warning on
MSVC.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11380>
2021-06-16 13:04:55 +00:00
Erik Faye-Lund fde7b6694b zink: use alloca instead of hard-to-size vlas
These variable-length arrays are hard to size statically, and VLAs
aren't supported by MSVC. So let's use alloca instead.

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11380>
2021-06-16 13:04:55 +00:00
Erik Faye-Lund 14597315f8 zink: use max-descriptor define
This avoids compile errors on MSVC due to VLAs.

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11380>
2021-06-16 13:04:55 +00:00
Erik Faye-Lund 4439f500a2 zink: introduce a define for max descriptors per type
We know what this max is in the compiler, let's move that out into
zink_descriptors.h, so we can reuse the constant.

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11380>
2021-06-16 13:04:55 +00:00
Erik Faye-Lund 0ee48216dd zink: fix more initializer styles
Empty initializer lists are a GCC extension, let's use the syntax that
compilers like MSVC also supports.

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11380>
2021-06-16 13:04:55 +00:00
Erik Faye-Lund 3179ce61e9 zink: drop some more vla usage
MSVC doesn't like them, so let's get rid of more of them.

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11380>
2021-06-16 13:04:55 +00:00
Erik Faye-Lund c14af0065e zink: add missing compiler-dependency
Without this, we depend on something else previously in the build to
have built these.

Fixes: ed2fb809 ("zink: introduce vk_dispatch_table")
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11380>
2021-06-16 13:04:55 +00:00
Erik Faye-Lund b20c1c2a3b zink: drop paranoid code
If we ever get here, res->dt is non-NULL. No need to assert, and no need
to check twice.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11414>
2021-06-16 12:42:07 +00:00
Erik Faye-Lund 0bb4703292 zink: do not unmap dt-buffers twice
Seems I missed that we already did an unconditional unmap here, and
forgot to remove it. Whoops.

Fixes: 5159f406d ("zink: use gallium api to copy to display-target")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11414>
2021-06-16 12:42:07 +00:00
Mike Blumenkrantz bb9efa527a zink: split stencil ref changes to separate dirty flag
the values here are for the cmdbuf, not the pipeline, so they should
always be updated regardless of what the current dsa state uses

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11396>
2021-06-16 12:10:08 +00:00
Mike Blumenkrantz e6a100b4cd zink: add update flag for dsa state change
reduce overhead by avoiding unnecessary updates

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11396>
2021-06-16 12:10:08 +00:00