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r300/compiler: remove any code related to relative addressing of temporaries 

The hw can't do it and the code was useless anyway (it's lowered
in the GLSL compiler).
This commit is contained in:
Marek Olšák 2011-01-23 12:03:59 +01:00
parent 835c4ea105
commit ffcdd49c69
13 changed files with 38 additions and 121 deletions
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7
src/gallium/drivers/r300/r300_fs.c
View File

@ -414,6 +414,13 @@ static void r300_translate_fragment_shader(
r300_tgsi_to_rc(&ttr, tokens);
if (ttr.error) {
fprintf(stderr, "r300 FP: Cannot translate a shader. "
"Using a dummy shader instead.\n");
r300_dummy_fragment_shader(r300, shader);
return;
}
if (!r300->screen->caps.is_r500 ||
compiler.Base.Program.Constants.Count > 200) {
compiler.Base.remove_unused_constants = TRUE;

9
src/gallium/drivers/r300/r300_tgsi_to_rc.c
View File

@ -191,7 +191,12 @@ static void transform_dstreg(
dst->File = translate_register_file(src->Register.File);
dst->Index = translate_register_index(ttr, src->Register.File, src->Register.Index);
dst->WriteMask = src->Register.WriteMask;
dst->RelAddr = src->Register.Indirect;
if (src->Register.Indirect) {
ttr->error = TRUE;
fprintf(stderr, "r300: Relative addressing of destination operands "
"is unsupported.\n");
}
}
static void transform_srcreg(
@ -332,6 +337,8 @@ void r300_tgsi_to_rc(struct tgsi_to_rc * ttr,
unsigned imm_index = 0;
int i;
ttr->error = FALSE;
/* Allocate constants placeholders.
*
* Note: What if declared constants are not contiguous? */

3
src/gallium/drivers/r300/r300_tgsi_to_rc.h
View File

@ -47,6 +47,9 @@ struct tgsi_to_rc {
/* Vertex shaders have no half swizzles, and no way to handle them, so
* until rc grows proper support, indicate if they're safe to use. */
boolean use_half_swizzles;
/* If an error occured. */
boolean error;
};
void r300_tgsi_to_rc(struct tgsi_to_rc * ttr, const struct tgsi_token * tokens);

7
src/gallium/drivers/r300/r300_vs.c
View File

@ -226,6 +226,13 @@ void r300_translate_vertex_shader(struct r300_context *r300,
r300_tgsi_to_rc(&ttr, vs->state.tokens);
if (ttr.error) {
fprintf(stderr, "r300 VP: Cannot translate a shader. "
"Using a dummy shader instead.\n");
r300_dummy_vertex_shader(r300, vs);
return;
}
if (compiler.Base.Program.Constants.Count > 200) {
compiler.Base.remove_unused_constants = TRUE;
}

69
src/mesa/drivers/dri/r300/compiler/r3xx_vertprog.c
View File

@ -490,13 +490,6 @@ static void translate_vertex_program(struct radeon_compiler *c, void *user)
continue;
if (info->HasDstReg) {
/* Relative addressing of destination operands is not supported yet. */
if (vpi->DstReg.RelAddr) {
rc_error(&compiler->Base, "Vertex program does not support relative "
"addressing of destination operands (yet).\n");
return;
}
/* Neither is Saturate. */
if (vpi->SaturateMode != RC_SATURATE_NONE) {
rc_error(&compiler->Base, "Vertex program does not support the Saturate "
@ -668,7 +661,6 @@ static void allocate_temporary_registers(struct radeon_compiler *c, void *user)
char hwtemps[RC_REGISTER_MAX_INDEX];
struct temporary_allocation * ta;
unsigned int i, j;
struct rc_instruction *last_inst_src_reladdr = NULL;
memset(hwtemps, 0, sizeof(hwtemps));
@ -693,28 +685,11 @@ static void allocate_temporary_registers(struct radeon_compiler *c, void *user)
}
}
/* Pass 2: If there is relative addressing of dst temporaries, we cannot change register indices. Give up.
* For src temporaries, save the last instruction which uses relative addressing. */
for (inst = compiler->Base.Program.Instructions.Next; inst != &compiler->Base.Program.Instructions; inst = inst->Next) {
const struct rc_opcode_info *opcode = rc_get_opcode_info(inst->U.I.Opcode);
if (opcode->HasDstReg)
if (inst->U.I.DstReg.RelAddr)
return;
for (i = 0; i < opcode->NumSrcRegs; ++i) {
if (inst->U.I.SrcReg[i].File == RC_FILE_TEMPORARY &&
inst->U.I.SrcReg[i].RelAddr) {
last_inst_src_reladdr = inst;
}
}
}
ta = (struct temporary_allocation*)memory_pool_malloc(&compiler->Base.Pool,
sizeof(struct temporary_allocation) * num_orig_temps);
memset(ta, 0, sizeof(struct temporary_allocation) * num_orig_temps);
/* Pass 3: Determine original temporary lifetimes */
/* Pass 2: Determine original temporary lifetimes */
for(inst = compiler->Base.Program.Instructions.Next; inst != &compiler->Base.Program.Instructions; inst = inst->Next) {
const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
/* Instructions inside of loops need to use the ENDLOOP
@ -744,41 +719,22 @@ static void allocate_temporary_registers(struct radeon_compiler *c, void *user)
for (i = 0; i < opcode->NumSrcRegs; ++i) {
if (inst->U.I.SrcReg[i].File == RC_FILE_TEMPORARY) {
struct rc_instruction *last_read;
/* From "last_inst_src_reladdr", "end_loop", and "inst",
* select the instruction with the highest instruction index (IP).
* Note that "end_loop", if available, has always a higher index than "inst". */
if (last_inst_src_reladdr) {
if (end_loop) {
last_read = last_inst_src_reladdr->IP > end_loop->IP ?
last_inst_src_reladdr : end_loop;
} else {
last_read = last_inst_src_reladdr->IP > inst->IP ?
last_inst_src_reladdr : inst;
}
} else {
last_read = end_loop ? end_loop : inst;
}
ta[inst->U.I.SrcReg[i].Index].LastRead = last_read;
ta[inst->U.I.SrcReg[i].Index].LastRead = end_loop ? end_loop : inst;
}
}
}
/* Pass 4: Register allocation */
/* Pass 3: Register allocation */
for(inst = compiler->Base.Program.Instructions.Next; inst != &compiler->Base.Program.Instructions; inst = inst->Next) {
const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
if (!last_inst_src_reladdr || last_inst_src_reladdr->IP < inst->IP) {
for (i = 0; i < opcode->NumSrcRegs; ++i) {
if (inst->U.I.SrcReg[i].File == RC_FILE_TEMPORARY) {
unsigned int orig = inst->U.I.SrcReg[i].Index;
inst->U.I.SrcReg[i].Index = ta[orig].HwTemp;
for (i = 0; i < opcode->NumSrcRegs; ++i) {
if (inst->U.I.SrcReg[i].File == RC_FILE_TEMPORARY) {
unsigned int orig = inst->U.I.SrcReg[i].Index;
inst->U.I.SrcReg[i].Index = ta[orig].HwTemp;
if (ta[orig].Allocated && inst == ta[orig].LastRead)
hwtemps[ta[orig].HwTemp] = 0;
}
if (ta[orig].Allocated && inst == ta[orig].LastRead)
hwtemps[ta[orig].HwTemp] = 0;
}
}
@ -792,12 +748,7 @@ static void allocate_temporary_registers(struct radeon_compiler *c, void *user)
break;
}
ta[orig].Allocated = 1;
if (last_inst_src_reladdr &&
last_inst_src_reladdr->IP > inst->IP) {
ta[orig].HwTemp = orig;
} else {
ta[orig].HwTemp = j;
}
ta[orig].HwTemp = j;
hwtemps[ta[orig].HwTemp] = 1;
}

45
src/mesa/drivers/dri/r300/compiler/radeon_dataflow_deadcode.c
View File

@ -160,12 +160,8 @@ static void update_instruction(struct deadcode_state * s, struct rc_instruction
unsigned char * pused = get_used_ptr(s, inst->U.I.DstReg.File, inst->U.I.DstReg.Index);
if (pused) {
usedmask = *pused & inst->U.I.DstReg.WriteMask;
if (!inst->U.I.DstReg.RelAddr)
*pused &= ~usedmask;
*pused &= ~usedmask;
}
if (inst->U.I.DstReg.RelAddr)
mark_used(s, RC_FILE_ADDRESS, 0, RC_MASK_X);
}
insts->WriteMask |= usedmask;
@ -219,22 +215,9 @@ void rc_dataflow_deadcode(struct radeon_compiler * c, void *user)
{
struct deadcode_state s;
unsigned int nr_instructions;
unsigned has_temp_reladdr_src = 0;
rc_dataflow_mark_outputs_fn dce = (rc_dataflow_mark_outputs_fn)user;
unsigned int ip;
/* Give up if there is relative addressing of destination operands. */
for(struct rc_instruction * inst = c->Program.Instructions.Next;
inst != &c->Program.Instructions;
inst = inst->Next) {
const struct rc_opcode_info *opcode = rc_get_opcode_info(inst->U.I.Opcode);
if (opcode->HasDstReg &&
inst->U.I.DstReg.WriteMask &&
inst->U.I.DstReg.RelAddr) {
return;
}
}
memset(&s, 0, sizeof(s));
s.C = c;
@ -321,32 +304,6 @@ void rc_dataflow_deadcode(struct radeon_compiler * c, void *user)
rc_error(c, "%s: Unhandled control flow instruction %s\n", __FUNCTION__, opcode->Name);
}
}
if (!has_temp_reladdr_src) {
for (unsigned i = 0; i < opcode->NumSrcRegs; i++) {
if (inst->U.I.SrcReg[i].File == RC_FILE_TEMPORARY &&
inst->U.I.SrcReg[i].RelAddr) {
/* If there is a register read from a temporary file with relative addressing,
* mark all preceding written registers as used. */
for (struct rc_instruction *ptr = inst->Prev;
ptr != &c->Program.Instructions;
ptr = ptr->Prev) {
opcode = rc_get_opcode_info(ptr->U.I.Opcode);
if (opcode->HasDstReg &&
ptr->U.I.DstReg.File == RC_FILE_TEMPORARY &&
ptr->U.I.DstReg.WriteMask) {
mark_used(&s,
ptr->U.I.DstReg.File,
ptr->U.I.DstReg.Index,
ptr->U.I.DstReg.WriteMask);
}
}
has_temp_reladdr_src = 1;
break;
}
}
}
}
update_instruction(&s, inst);

1
src/mesa/drivers/dri/r300/compiler/radeon_optimize.c
View File

@ -139,7 +139,6 @@ static void copy_propagate(struct radeon_compiler * c, struct rc_instruction * i
unsigned int i;
if (inst_mov->U.I.DstReg.File != RC_FILE_TEMPORARY ||
inst_mov->U.I.DstReg.RelAddr ||
inst_mov->U.I.WriteALUResult ||
inst_mov->U.I.SaturateMode)
return;

6
src/mesa/drivers/dri/r300/compiler/radeon_pair_translate.c
View File

@ -302,12 +302,6 @@ static void check_opcode_support(struct r300_fragment_program_compiler *c,
const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->Opcode);
if (opcode->HasDstReg) {
if (inst->DstReg.RelAddr) {
rc_error(&c->Base, "Fragment program does not support relative addressing "
"of destination operands.\n");
return;
}
if (inst->SaturateMode == RC_SATURATE_MINUS_PLUS_ONE) {
rc_error(&c->Base, "Fragment program does not support signed Saturate.\n");
return;

6
src/mesa/drivers/dri/r300/compiler/radeon_program.h
View File

@ -56,11 +56,7 @@ struct rc_src_register {
struct rc_dst_register {
unsigned int File:3;
/** Negative values may be used for relative addressing. */
signed int Index:(RC_REGISTER_INDEX_BITS+1);
unsigned int RelAddr:1;
unsigned int Index:RC_REGISTER_INDEX_BITS;
unsigned int WriteMask:4;
};

1
src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c
View File

@ -91,7 +91,6 @@ static struct rc_dst_register dstregtmpmask(int index, int mask)
dst.File = RC_FILE_TEMPORARY;
dst.Index = index;
dst.WriteMask = mask;
dst.RelAddr = 0;
return dst;
}

2
src/mesa/drivers/dri/r300/compiler/radeon_program_print.c
View File

@ -110,7 +110,7 @@ static void rc_print_mask(FILE * f, unsigned int mask)
static void rc_print_dst_register(FILE * f, struct rc_dst_register dst)
{
rc_print_register(f, dst.File, dst.Index, dst.RelAddr);
rc_print_register(f, dst.File, dst.Index, 0);
if (dst.WriteMask != RC_MASK_XYZW) {
fprintf(f, ".");
rc_print_mask(f, dst.WriteMask);

2
src/mesa/drivers/dri/r300/r300_blit.c
View File

@ -63,7 +63,6 @@ static void create_vertex_program(struct r300_context *r300)
inst->U.I.Opcode = RC_OPCODE_MOV;
inst->U.I.DstReg.File = RC_FILE_OUTPUT;
inst->U.I.DstReg.Index = VERT_RESULT_HPOS;
inst->U.I.DstReg.RelAddr = 0;
inst->U.I.DstReg.WriteMask = RC_MASK_XYZW;
inst->U.I.SrcReg[0].Abs = 0;
inst->U.I.SrcReg[0].File = RC_FILE_INPUT;
@ -76,7 +75,6 @@ static void create_vertex_program(struct r300_context *r300)
inst->U.I.Opcode = RC_OPCODE_MOV;
inst->U.I.DstReg.File = RC_FILE_OUTPUT;
inst->U.I.DstReg.Index = VERT_RESULT_TEX0;
inst->U.I.DstReg.RelAddr = 0;
inst->U.I.DstReg.WriteMask = RC_MASK_XYZW;
inst->U.I.SrcReg[0].Abs = 0;
inst->U.I.SrcReg[0].File = RC_FILE_INPUT;

1
src/mesa/drivers/dri/r300/radeon_mesa_to_rc.c
View File

@ -128,7 +128,6 @@ static void translate_dstreg(struct rc_dst_register * dest, struct prog_dst_regi
{
dest->File = translate_register_file(src->File);
dest->Index = src->Index;
dest->RelAddr = src->RelAddr;
dest->WriteMask = src->WriteMask;
}