gallium: Drop the unused ARA opcode.
Nothing in the tree generated it. v2: Only drop ARA, not ARR as well. Reviewed-by: Jose Fonseca <jfonseca@vmware.com> (v2)
This commit is contained in:
parent
de2f8d75db
commit
ff886c4955
|
@ -212,7 +212,6 @@ lp_build_tgsi_inst_llvm(
|
||||||
case TGSI_OPCODE_UP4B:
|
case TGSI_OPCODE_UP4B:
|
||||||
case TGSI_OPCODE_UP4UB:
|
case TGSI_OPCODE_UP4UB:
|
||||||
case TGSI_OPCODE_X2D:
|
case TGSI_OPCODE_X2D:
|
||||||
case TGSI_OPCODE_ARA:
|
|
||||||
case TGSI_OPCODE_BRA:
|
case TGSI_OPCODE_BRA:
|
||||||
case TGSI_OPCODE_PUSHA:
|
case TGSI_OPCODE_PUSHA:
|
||||||
case TGSI_OPCODE_POPA:
|
case TGSI_OPCODE_POPA:
|
||||||
|
|
|
@ -798,12 +798,6 @@ lp_emit_instruction_aos(
|
||||||
return FALSE;
|
return FALSE;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_ARA:
|
|
||||||
/* deprecated */
|
|
||||||
assert(0);
|
|
||||||
return FALSE;
|
|
||||||
break;
|
|
||||||
|
|
||||||
case TGSI_OPCODE_ARR:
|
case TGSI_OPCODE_ARR:
|
||||||
src0 = lp_build_emit_fetch(&bld->bld_base, inst, 0, LP_CHAN_ALL);
|
src0 = lp_build_emit_fetch(&bld->bld_base, inst, 0, LP_CHAN_ALL);
|
||||||
dst0 = lp_build_round(&bld->bld_base.base, src0);
|
dst0 = lp_build_round(&bld->bld_base.base, src0);
|
||||||
|
|
|
@ -3912,10 +3912,6 @@ exec_instruction(
|
||||||
exec_x2d(mach, inst);
|
exec_x2d(mach, inst);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TGSI_OPCODE_ARA:
|
|
||||||
assert (0);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case TGSI_OPCODE_ARR:
|
case TGSI_OPCODE_ARR:
|
||||||
exec_vector_unary(mach, inst, micro_arr, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
|
exec_vector_unary(mach, inst, micro_arr, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
|
||||||
break;
|
break;
|
||||||
|
|
|
@ -97,7 +97,7 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
|
||||||
{ 1, 1, 0, 0, 0, 0, COMP, "UP4B", TGSI_OPCODE_UP4B },
|
{ 1, 1, 0, 0, 0, 0, COMP, "UP4B", TGSI_OPCODE_UP4B },
|
||||||
{ 1, 1, 0, 0, 0, 0, COMP, "UP4UB", TGSI_OPCODE_UP4UB },
|
{ 1, 1, 0, 0, 0, 0, COMP, "UP4UB", TGSI_OPCODE_UP4UB },
|
||||||
{ 1, 3, 0, 0, 0, 0, COMP, "X2D", TGSI_OPCODE_X2D },
|
{ 1, 3, 0, 0, 0, 0, COMP, "X2D", TGSI_OPCODE_X2D },
|
||||||
{ 1, 1, 0, 0, 0, 0, COMP, "ARA", TGSI_OPCODE_ARA },
|
{ 0, 1, 0, 0, 0, 1, NONE, "", 60 }, /* removed */
|
||||||
{ 1, 1, 0, 0, 0, 0, COMP, "ARR", TGSI_OPCODE_ARR },
|
{ 1, 1, 0, 0, 0, 0, COMP, "ARR", TGSI_OPCODE_ARR },
|
||||||
{ 0, 1, 0, 0, 0, 0, NONE, "BRA", TGSI_OPCODE_BRA },
|
{ 0, 1, 0, 0, 0, 0, NONE, "BRA", TGSI_OPCODE_BRA },
|
||||||
{ 0, 0, 0, 1, 0, 0, NONE, "CAL", TGSI_OPCODE_CAL },
|
{ 0, 0, 0, 1, 0, 0, NONE, "CAL", TGSI_OPCODE_CAL },
|
||||||
|
|
|
@ -112,7 +112,6 @@ OP11(UP2US)
|
||||||
OP11(UP4B)
|
OP11(UP4B)
|
||||||
OP11(UP4UB)
|
OP11(UP4UB)
|
||||||
OP13(X2D)
|
OP13(X2D)
|
||||||
OP11(ARA)
|
|
||||||
OP11(ARR)
|
OP11(ARR)
|
||||||
OP01(BRA)
|
OP01(BRA)
|
||||||
OP00_LBL(CAL)
|
OP00_LBL(CAL)
|
||||||
|
|
|
@ -701,14 +701,6 @@ This instruction replicates its result.
|
||||||
Considered for removal.
|
Considered for removal.
|
||||||
|
|
||||||
|
|
||||||
.. opcode:: ARA - Address Register Add
|
|
||||||
|
|
||||||
TBD
|
|
||||||
|
|
||||||
.. note::
|
|
||||||
|
|
||||||
Considered for removal.
|
|
||||||
|
|
||||||
.. opcode:: ARR - Address Register Load With Round
|
.. opcode:: ARR - Address Register Load With Round
|
||||||
|
|
||||||
.. math::
|
.. math::
|
||||||
|
|
|
@ -854,7 +854,6 @@ static const toy_tgsi_translate aos_translate_table[TGSI_OPCODE_LAST] = {
|
||||||
[TGSI_OPCODE_UP4B] = aos_unsupported,
|
[TGSI_OPCODE_UP4B] = aos_unsupported,
|
||||||
[TGSI_OPCODE_UP4UB] = aos_unsupported,
|
[TGSI_OPCODE_UP4UB] = aos_unsupported,
|
||||||
[TGSI_OPCODE_X2D] = aos_unsupported,
|
[TGSI_OPCODE_X2D] = aos_unsupported,
|
||||||
[TGSI_OPCODE_ARA] = aos_unsupported,
|
|
||||||
[TGSI_OPCODE_ARR] = aos_simple,
|
[TGSI_OPCODE_ARR] = aos_simple,
|
||||||
[TGSI_OPCODE_BRA] = aos_unsupported,
|
[TGSI_OPCODE_BRA] = aos_unsupported,
|
||||||
[TGSI_OPCODE_CAL] = aos_unsupported,
|
[TGSI_OPCODE_CAL] = aos_unsupported,
|
||||||
|
@ -1404,7 +1403,6 @@ static const toy_tgsi_translate soa_translate_table[TGSI_OPCODE_LAST] = {
|
||||||
[TGSI_OPCODE_UP4B] = soa_unsupported,
|
[TGSI_OPCODE_UP4B] = soa_unsupported,
|
||||||
[TGSI_OPCODE_UP4UB] = soa_unsupported,
|
[TGSI_OPCODE_UP4UB] = soa_unsupported,
|
||||||
[TGSI_OPCODE_X2D] = soa_unsupported,
|
[TGSI_OPCODE_X2D] = soa_unsupported,
|
||||||
[TGSI_OPCODE_ARA] = soa_unsupported,
|
|
||||||
[TGSI_OPCODE_ARR] = soa_per_channel,
|
[TGSI_OPCODE_ARR] = soa_per_channel,
|
||||||
[TGSI_OPCODE_BRA] = soa_unsupported,
|
[TGSI_OPCODE_BRA] = soa_unsupported,
|
||||||
[TGSI_OPCODE_CAL] = soa_unsupported,
|
[TGSI_OPCODE_CAL] = soa_unsupported,
|
||||||
|
|
|
@ -87,7 +87,6 @@ static unsigned translate_opcode(unsigned opcode)
|
||||||
/* case TGSI_OPCODE_UP4B: return RC_OPCODE_UP4B; */
|
/* case TGSI_OPCODE_UP4B: return RC_OPCODE_UP4B; */
|
||||||
/* case TGSI_OPCODE_UP4UB: return RC_OPCODE_UP4UB; */
|
/* case TGSI_OPCODE_UP4UB: return RC_OPCODE_UP4UB; */
|
||||||
/* case TGSI_OPCODE_X2D: return RC_OPCODE_X2D; */
|
/* case TGSI_OPCODE_X2D: return RC_OPCODE_X2D; */
|
||||||
/* case TGSI_OPCODE_ARA: return RC_OPCODE_ARA; */
|
|
||||||
/* case TGSI_OPCODE_ARR: return RC_OPCODE_ARR; */
|
/* case TGSI_OPCODE_ARR: return RC_OPCODE_ARR; */
|
||||||
/* case TGSI_OPCODE_BRA: return RC_OPCODE_BRA; */
|
/* case TGSI_OPCODE_BRA: return RC_OPCODE_BRA; */
|
||||||
/* case TGSI_OPCODE_CAL: return RC_OPCODE_CAL; */
|
/* case TGSI_OPCODE_CAL: return RC_OPCODE_CAL; */
|
||||||
|
|
|
@ -7248,7 +7248,7 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
|
||||||
{TGSI_OPCODE_UP4B, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{TGSI_OPCODE_UP4B, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
{TGSI_OPCODE_UP4UB, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{TGSI_OPCODE_UP4UB, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
{TGSI_OPCODE_X2D, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{TGSI_OPCODE_X2D, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
{TGSI_OPCODE_ARA, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{60, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
{TGSI_OPCODE_ARR, 0, ALU_OP0_NOP, tgsi_r600_arl},
|
{TGSI_OPCODE_ARR, 0, ALU_OP0_NOP, tgsi_r600_arl},
|
||||||
{TGSI_OPCODE_BRA, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{TGSI_OPCODE_BRA, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
{TGSI_OPCODE_CAL, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{TGSI_OPCODE_CAL, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
|
@ -7447,7 +7447,7 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = {
|
||||||
{TGSI_OPCODE_UP4B, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{TGSI_OPCODE_UP4B, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
{TGSI_OPCODE_UP4UB, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{TGSI_OPCODE_UP4UB, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
{TGSI_OPCODE_X2D, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{TGSI_OPCODE_X2D, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
{TGSI_OPCODE_ARA, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{60, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
{TGSI_OPCODE_ARR, 0, ALU_OP0_NOP, tgsi_eg_arl},
|
{TGSI_OPCODE_ARR, 0, ALU_OP0_NOP, tgsi_eg_arl},
|
||||||
{TGSI_OPCODE_BRA, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{TGSI_OPCODE_BRA, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
{TGSI_OPCODE_CAL, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{TGSI_OPCODE_CAL, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
|
@ -7646,7 +7646,7 @@ static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = {
|
||||||
{TGSI_OPCODE_UP4B, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{TGSI_OPCODE_UP4B, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
{TGSI_OPCODE_UP4UB, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{TGSI_OPCODE_UP4UB, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
{TGSI_OPCODE_X2D, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{TGSI_OPCODE_X2D, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
{TGSI_OPCODE_ARA, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{60, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
{TGSI_OPCODE_ARR, 0, ALU_OP0_NOP, tgsi_eg_arl},
|
{TGSI_OPCODE_ARR, 0, ALU_OP0_NOP, tgsi_eg_arl},
|
||||||
{TGSI_OPCODE_BRA, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{TGSI_OPCODE_BRA, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
{TGSI_OPCODE_CAL, 0, ALU_OP0_NOP, tgsi_unsupported},
|
{TGSI_OPCODE_CAL, 0, ALU_OP0_NOP, tgsi_unsupported},
|
||||||
|
|
|
@ -343,7 +343,7 @@ struct tgsi_property_data {
|
||||||
#define TGSI_OPCODE_UP4B 57
|
#define TGSI_OPCODE_UP4B 57
|
||||||
#define TGSI_OPCODE_UP4UB 58
|
#define TGSI_OPCODE_UP4UB 58
|
||||||
#define TGSI_OPCODE_X2D 59
|
#define TGSI_OPCODE_X2D 59
|
||||||
#define TGSI_OPCODE_ARA 60
|
/* gap */
|
||||||
#define TGSI_OPCODE_ARR 61
|
#define TGSI_OPCODE_ARR 61
|
||||||
#define TGSI_OPCODE_BRA 62
|
#define TGSI_OPCODE_BRA 62
|
||||||
#define TGSI_OPCODE_CAL 63
|
#define TGSI_OPCODE_CAL 63
|
||||||
|
|
Loading…
Reference in New Issue