pan/mdg: Fix auxiliary load/store swizzle packing
It needs to respect the existing swizzle, as well as the type size. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6321>
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@ -310,9 +310,19 @@ mir_is_simple_swizzle(unsigned *swizzle, unsigned mask)
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/* Packs a load/store argument */
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/* Packs a load/store argument */
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static inline uint8_t
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static inline uint8_t
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midgard_ldst_reg(unsigned reg, unsigned component)
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midgard_ldst_reg(unsigned reg, unsigned component, unsigned size)
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{
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{
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assert((reg == REGISTER_LDST_BASE) || (reg == REGISTER_LDST_BASE + 1));
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assert((reg == REGISTER_LDST_BASE) || (reg == REGISTER_LDST_BASE + 1));
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assert(size == 16 || size == 32 || size == 64);
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/* Shift so everything is in terms of 32-bit units */
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if (size == 64) {
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assert(component < 2);
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component <<= 1;
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} else if (size == 16) {
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assert((component & 1) == 0);
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component >>= 1;
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}
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midgard_ldst_register_select sel = {
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midgard_ldst_register_select sel = {
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.component = component,
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.component = component,
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@ -501,12 +501,14 @@ load_store_from_instr(midgard_instruction *ins)
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if (ins->src[1] != ~0) {
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if (ins->src[1] != ~0) {
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unsigned src = SSA_REG_FROM_FIXED(ins->src[1]);
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unsigned src = SSA_REG_FROM_FIXED(ins->src[1]);
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ldst.arg_1 |= midgard_ldst_reg(src, ins->swizzle[1][0]);
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unsigned sz = nir_alu_type_get_type_size(ins->src_types[1]);
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ldst.arg_1 |= midgard_ldst_reg(src, ins->swizzle[1][0], sz);
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}
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}
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if (ins->src[2] != ~0) {
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if (ins->src[2] != ~0) {
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unsigned src = SSA_REG_FROM_FIXED(ins->src[2]);
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unsigned src = SSA_REG_FROM_FIXED(ins->src[2]);
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ldst.arg_2 |= midgard_ldst_reg(src, ins->swizzle[2][0]);
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unsigned sz = nir_alu_type_get_type_size(ins->src_types[2]);
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ldst.arg_2 |= midgard_ldst_reg(src, ins->swizzle[2][0], sz);
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}
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}
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return ldst;
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return ldst;
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@ -723,19 +723,19 @@ install_registers_instr(
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unsigned src3 = ins->src[2];
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unsigned src3 = ins->src[2];
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if (src2 != ~0) {
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if (src2 != ~0) {
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struct phys_reg src = index_to_reg(ctx, l, src2, 2);
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struct phys_reg src = index_to_reg(ctx, l, src2, src_shift[1]);
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unsigned component = src.offset >> src.shift;
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unsigned component = src.offset >> src.shift;
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assert(component << src.shift == src.offset);
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assert(component << src.shift == src.offset);
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ins->src[1] = SSA_FIXED_REGISTER(src.reg);
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ins->src[1] = SSA_FIXED_REGISTER(src.reg);
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ins->swizzle[1][0] = component;
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ins->swizzle[1][0] += component;
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}
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}
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if (src3 != ~0) {
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if (src3 != ~0) {
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struct phys_reg src = index_to_reg(ctx, l, src3, 2);
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struct phys_reg src = index_to_reg(ctx, l, src3, src_shift[2]);
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unsigned component = src.offset >> src.shift;
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unsigned component = src.offset >> src.shift;
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assert(component << src.shift == src.offset);
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assert(component << src.shift == src.offset);
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ins->src[2] = SSA_FIXED_REGISTER(src.reg);
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ins->src[2] = SSA_FIXED_REGISTER(src.reg);
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ins->swizzle[2][0] = component;
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ins->swizzle[2][0] += component;
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}
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}
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break;
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break;
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