From fedc1fda3096d6e41ccd40efdcff6dc966badbc3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sat, 29 Sep 2018 19:28:20 -0400 Subject: [PATCH] radeonsi: save raster config in screen, add se_tile_repeat --- src/amd/common/ac_gpu_info.c | 13 +++++++++++-- src/amd/common/ac_gpu_info.h | 3 ++- src/amd/vulkan/si_cmd_buffer.c | 2 +- src/gallium/drivers/radeonsi/si_pipe.c | 9 +++++++++ src/gallium/drivers/radeonsi/si_pipe.h | 3 +++ src/gallium/drivers/radeonsi/si_state.c | 12 +++++------- 6 files changed, 31 insertions(+), 11 deletions(-) diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index 766ad835476..d6df2f6443e 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -643,9 +643,10 @@ ac_get_gs_table_depth(enum chip_class chip_class, enum radeon_family family) void ac_get_raster_config(struct radeon_info *info, uint32_t *raster_config_p, - uint32_t *raster_config_1_p) + uint32_t *raster_config_1_p, + uint32_t *se_tile_repeat_p) { - unsigned raster_config, raster_config_1; + unsigned raster_config, raster_config_1, se_tile_repeat; switch (info->family) { /* 1 SE / 1 RB */ @@ -722,8 +723,16 @@ ac_get_raster_config(struct radeon_info *info, raster_config_1 = 0x0000002a; } + unsigned se_width = 8 << G_028350_SE_XSEL_GFX6(raster_config); + unsigned se_height = 8 << G_028350_SE_YSEL_GFX6(raster_config); + + /* I don't know how to calculate this, though this is probably a good guess. */ + se_tile_repeat = MAX2(se_width, se_height) * info->max_se; + *raster_config_p = raster_config; *raster_config_1_p = raster_config_1; + if (se_tile_repeat_p) + *se_tile_repeat_p = se_tile_repeat; } void diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index 0583a6037f2..a7dc1094c05 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -150,7 +150,8 @@ void ac_print_gpu_info(struct radeon_info *info); int ac_get_gs_table_depth(enum chip_class chip_class, enum radeon_family family); void ac_get_raster_config(struct radeon_info *info, uint32_t *raster_config_p, - uint32_t *raster_config_1_p); + uint32_t *raster_config_1_p, + uint32_t *se_tile_repeat_p); void ac_get_harvested_configs(struct radeon_info *info, unsigned raster_config, unsigned *cik_raster_config_1_p, diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index e0d474756a3..de057657ee7 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -134,7 +134,7 @@ si_set_raster_config(struct radv_physical_device *physical_device, ac_get_raster_config(&physical_device->rad_info, &raster_config, - &raster_config_1); + &raster_config_1, NULL); /* Always use the default config when all backends are enabled * (or when we failed to determine the enabled backends). diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index ea321bf62d3..14b075c7b76 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -819,6 +819,15 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws, ws->query_info(ws, &sscreen->info); si_handle_env_var_force_family(sscreen); + if (sscreen->info.chip_class >= GFX9) { + sscreen->se_tile_repeat = 32 * sscreen->info.max_se; + } else { + ac_get_raster_config(&sscreen->info, + &sscreen->pa_sc_raster_config, + &sscreen->pa_sc_raster_config_1, + &sscreen->se_tile_repeat); + } + sscreen->debug_flags = debug_get_flags_option("R600_DEBUG", debug_options, 0); diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index dad3029bc31..ff11eab0224 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -405,6 +405,9 @@ struct si_screen { uint64_t debug_flags; char renderer_string[183]; + unsigned pa_sc_raster_config; + unsigned pa_sc_raster_config_1; + unsigned se_tile_repeat; unsigned gs_table_depth; unsigned tess_offchip_block_dw_size; unsigned tess_offchip_ring_size; diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index bc1417aadfb..a170d525ecf 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -4782,13 +4782,11 @@ si_write_harvested_raster_configs(struct si_context *sctx, static void si_set_raster_config(struct si_context *sctx, struct si_pm4_state *pm4) { - unsigned num_rb = MIN2(sctx->screen->info.num_render_backends, 16); - unsigned rb_mask = sctx->screen->info.enabled_rb_mask; - unsigned raster_config, raster_config_1; - - ac_get_raster_config(&sctx->screen->info, - &raster_config, - &raster_config_1); + struct si_screen *sscreen = sctx->screen; + unsigned num_rb = MIN2(sscreen->info.num_render_backends, 16); + unsigned rb_mask = sscreen->info.enabled_rb_mask; + unsigned raster_config = sscreen->pa_sc_raster_config; + unsigned raster_config_1 = sscreen->pa_sc_raster_config_1; if (!rb_mask || util_bitcount(rb_mask) >= num_rb) { /* Always use the default config when all backends are enabled