nir/schedule: allow drivers to decide about instruction latency

On V3D reading UBOs from uniform addresses uses a more efficient
mechanism with lower latency. On other platforms there may be
simular scenarios.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15276>
This commit is contained in:
Iago Toral Quiroga 2022-03-03 12:18:02 +01:00 committed by Marge Bot
parent e7a4e97076
commit fed51585c4
2 changed files with 16 additions and 3 deletions

View File

@ -1002,8 +1002,13 @@ nir_schedule_instructions(nir_schedule_scoreboard *scoreboard, nir_block *block)
}
static uint32_t
nir_schedule_get_delay(nir_instr *instr)
nir_schedule_get_delay(nir_schedule_scoreboard *scoreboard, nir_instr *instr)
{
if (scoreboard->options->instr_delay_cb) {
void *cb_data = scoreboard->options->instr_delay_cb_data;
return scoreboard->options->instr_delay_cb(instr, cb_data);
}
switch (instr->type) {
case nir_instr_type_ssa_undef:
case nir_instr_type_load_const:
@ -1065,7 +1070,7 @@ nir_schedule_block(nir_schedule_scoreboard *scoreboard, nir_block *block)
rzalloc(mem_ctx, nir_schedule_node);
n->instr = instr;
n->delay = nir_schedule_get_delay(instr);
n->delay = nir_schedule_get_delay(scoreboard, instr);
dag_init_node(scoreboard->dag, &n->dag);
_mesa_hash_table_insert(scoreboard->instr_map, instr, n);

View File

@ -71,8 +71,16 @@ typedef struct nir_schedule_options {
bool (* intrinsic_cb)(nir_intrinsic_instr *intr,
nir_schedule_dependency *dep,
void *user_data);
/* Data to pass to the callback */
/* Data to pass to the intrinsic callback */
void *intrinsic_cb_data;
/* Callback used to specify instruction delays */
unsigned (* instr_delay_cb)(nir_instr *instr, void *user_data);
/* Data to pass to the instruction delay callback */
void *instr_delay_cb_data;
} nir_schedule_options;
void nir_schedule(nir_shader *shader, const nir_schedule_options *options);