radeonsi: skip redundant INDEX_TYPE writes
Ported from Vulkan. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
parent
bdf767dac4
commit
fe40a65fb6
|
@ -225,6 +225,7 @@ void si_begin_new_cs(struct si_context *ctx)
|
||||||
/* Invalidate various draw states so that they are emitted before
|
/* Invalidate various draw states so that they are emitted before
|
||||||
* the first draw call. */
|
* the first draw call. */
|
||||||
si_invalidate_draw_sh_constants(ctx);
|
si_invalidate_draw_sh_constants(ctx);
|
||||||
|
ctx->last_index_size = -1;
|
||||||
ctx->last_primitive_restart_en = -1;
|
ctx->last_primitive_restart_en = -1;
|
||||||
ctx->last_restart_index = SI_RESTART_INDEX_UNKNOWN;
|
ctx->last_restart_index = SI_RESTART_INDEX_UNKNOWN;
|
||||||
ctx->last_gs_out_prim = -1;
|
ctx->last_gs_out_prim = -1;
|
||||||
|
|
|
@ -307,6 +307,7 @@ struct si_context {
|
||||||
bool occlusion_queries_disabled;
|
bool occlusion_queries_disabled;
|
||||||
|
|
||||||
/* Emitted draw state. */
|
/* Emitted draw state. */
|
||||||
|
int last_index_size;
|
||||||
int last_base_vertex;
|
int last_base_vertex;
|
||||||
int last_start_instance;
|
int last_start_instance;
|
||||||
int last_drawid;
|
int last_drawid;
|
||||||
|
|
|
@ -553,6 +553,7 @@ static void si_emit_draw_packets(struct si_context *sctx,
|
||||||
|
|
||||||
/* draw packet */
|
/* draw packet */
|
||||||
if (info->indexed) {
|
if (info->indexed) {
|
||||||
|
if (ib->index_size != sctx->last_index_size) {
|
||||||
radeon_emit(cs, PKT3(PKT3_INDEX_TYPE, 0, 0));
|
radeon_emit(cs, PKT3(PKT3_INDEX_TYPE, 0, 0));
|
||||||
|
|
||||||
/* index type */
|
/* index type */
|
||||||
|
@ -575,6 +576,9 @@ static void si_emit_draw_packets(struct si_context *sctx,
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
sctx->last_index_size = ib->index_size;
|
||||||
|
}
|
||||||
|
|
||||||
index_max_size = (ib->buffer->width0 - ib->offset) /
|
index_max_size = (ib->buffer->width0 - ib->offset) /
|
||||||
ib->index_size;
|
ib->index_size;
|
||||||
index_va = r600_resource(ib->buffer)->gpu_address + ib->offset;
|
index_va = r600_resource(ib->buffer)->gpu_address + ib->offset;
|
||||||
|
@ -582,6 +586,12 @@ static void si_emit_draw_packets(struct si_context *sctx,
|
||||||
radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
|
radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
|
||||||
(struct r600_resource *)ib->buffer,
|
(struct r600_resource *)ib->buffer,
|
||||||
RADEON_USAGE_READ, RADEON_PRIO_INDEX_BUFFER);
|
RADEON_USAGE_READ, RADEON_PRIO_INDEX_BUFFER);
|
||||||
|
} else {
|
||||||
|
/* On CI and later, non-indexed draws overwrite VGT_INDEX_TYPE,
|
||||||
|
* so the state must be re-emitted before the next indexed draw.
|
||||||
|
*/
|
||||||
|
if (sctx->b.chip_class >= CIK)
|
||||||
|
sctx->last_index_size = -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!info->indirect) {
|
if (!info->indirect) {
|
||||||
|
|
Loading…
Reference in New Issue