radeonsi: add si_can_fast_clear_depth/stencil helpers
for later use Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
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@ -446,6 +446,24 @@ static void si_set_optimal_micro_tile_mode(struct si_screen *sscreen, struct si_
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p_atomic_inc(&sscreen->dirty_tex_counter);
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p_atomic_inc(&sscreen->dirty_tex_counter);
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}
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}
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static bool si_can_fast_clear_depth(struct si_texture *zstex, unsigned level, float depth,
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unsigned buffers)
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{
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/* TC-compatible HTILE only supports depth clears to 0 or 1. */
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return buffers & PIPE_CLEAR_DEPTH &&
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si_htile_enabled(zstex, level, PIPE_MASK_Z) &&
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(!zstex->tc_compatible_htile || depth == 0 || depth == 1);
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}
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static bool si_can_fast_clear_stencil(struct si_texture *zstex, unsigned level, uint8_t stencil,
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unsigned buffers)
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{
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/* TC-compatible HTILE only supports stencil clears to 0. */
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return buffers & PIPE_CLEAR_STENCIL &&
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si_htile_enabled(zstex, level, PIPE_MASK_S) &&
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(!zstex->tc_compatible_htile || stencil == 0);
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}
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static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
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static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
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const union pipe_color_union *color)
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const union pipe_color_union *color)
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{
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{
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@ -765,9 +783,7 @@ static void si_clear(struct pipe_context *ctx, unsigned buffers,
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zsbuf->u.tex.last_layer == util_max_layer(&zstex->buffer.b.b, 0)) {
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zsbuf->u.tex.last_layer == util_max_layer(&zstex->buffer.b.b, 0)) {
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unsigned level = zsbuf->u.tex.level;
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unsigned level = zsbuf->u.tex.level;
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/* TC-compatible HTILE only supports depth clears to 0 or 1. */
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if (si_can_fast_clear_depth(zstex, level, depth, buffers)) {
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if (buffers & PIPE_CLEAR_DEPTH && si_htile_enabled(zstex, level, PIPE_MASK_Z) &&
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(!zstex->tc_compatible_htile || depth == 0 || depth == 1)) {
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/* Need to disable EXPCLEAR temporarily if clearing
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/* Need to disable EXPCLEAR temporarily if clearing
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* to a new value. */
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* to a new value. */
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if (!(zstex->depth_cleared_level_mask & BITFIELD_BIT(level)) ||
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if (!(zstex->depth_cleared_level_mask & BITFIELD_BIT(level)) ||
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@ -790,10 +806,7 @@ static void si_clear(struct pipe_context *ctx, unsigned buffers,
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si_mark_atom_dirty(sctx, &sctx->atoms.s.db_render_state);
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si_mark_atom_dirty(sctx, &sctx->atoms.s.db_render_state);
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}
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}
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/* TC-compatible HTILE only supports stencil clears to 0. */
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if (si_can_fast_clear_stencil(zstex, level, stencil, buffers)) {
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if (buffers & PIPE_CLEAR_STENCIL &&
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si_htile_enabled(zstex, level, PIPE_MASK_S) &&
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(!zstex->tc_compatible_htile || stencil == 0)) {
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stencil &= 0xff;
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stencil &= 0xff;
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/* Need to disable EXPCLEAR temporarily if clearing
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/* Need to disable EXPCLEAR temporarily if clearing
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