radv: fix TC-compat HTILE with VK_FORMAT_D32_SFLOAT_S8_UINT on Vega
Copied from RadeonSI. This fixes all CTS dEQP-VK.renderpass.dedicated_allocation.formats.d32_sfloat_s8_uint.clear.* And some other ones which use the same format. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Dave Airlie <airlied@redhat.com>
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@ -416,6 +416,12 @@ si_make_texture_descriptor(struct radv_device *device,
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data_format = 0;
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}
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/* S8 with Z32 HTILE needs a special format. */
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if (device->physical_device->rad_info.chip_class >= GFX9 &&
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vk_format == VK_FORMAT_S8_UINT &&
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image->tc_compatible_htile)
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data_format = V_008F14_IMG_DATA_FORMAT_S8_32;
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type = radv_tex_dim(image->type, view_type, image->info.array_size, image->info.samples,
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is_storage_image, device->physical_device->rad_info.chip_class >= GFX9);
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if (type == V_008F1C_SQ_RSRC_IMG_1D_ARRAY) {
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