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ilo: migrate to ilo_layout 

Embed an ilo_layout in ilo_texture, and remove now duplicated members.
This commit is contained in:
Chia-I Wu 2014-08-08 15:36:36 +08:00
parent 925359bc78
commit fb3d506431
8 changed files with 221 additions and 1462 deletions
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44
src/gallium/drivers/ilo/ilo_blitter_blt.c
View File

@ -521,19 +521,20 @@ tex_clear_region(struct ilo_blitter *blitter,
if (dst->separate_s8)
return false;
if (dst->bo_stride > max_extent)
if (dst->layout.bo_stride > max_extent)
return false;
swctrl = ilo_blitter_blt_begin(blitter, dst_box->depth * 6,
dst->bo, dst->tiling, NULL, INTEL_TILING_NONE);
dst->bo, dst->layout.tiling, NULL, INTEL_TILING_NONE);
for (slice = 0; slice < dst_box->depth; slice++) {
const struct ilo_texture_slice *dst_slice =
ilo_texture_get_slice(dst, dst_level, dst_box->z + slice);
unsigned x1, y1, x2, y2;
x1 = dst_slice->x + dst_box->x;
y1 = dst_slice->y + dst_box->y;
ilo_layout_get_slice_pos(&dst->layout,
dst_level, dst_box->z + slice, &x1, &y1);
x1 += dst_box->x;
y1 += dst_box->y;
x2 = x1 + dst_box->width;
y2 = y1 + dst_box->height;
@ -542,7 +543,7 @@ tex_clear_region(struct ilo_blitter *blitter,
break;
gen6_emit_XY_COLOR_BLT(ilo->dev,
dst->bo, dst->tiling, dst->bo_stride, 0,
dst->bo, dst->layout.tiling, dst->layout.bo_stride, 0,
x1, y1, x2, y2, val, rop, value_mask, write_mask,
ilo->cp);
}
@ -562,7 +563,7 @@ tex_copy_region(struct ilo_blitter *blitter,
const struct pipe_box *src_box)
{
const struct util_format_description *desc =
util_format_description(dst->bo_format);
util_format_description(dst->layout.format);
const unsigned max_extent = 32767; /* INT16_MAX */
const uint8_t rop = 0xcc; /* SRCCOPY */
struct ilo_context *ilo = blitter->ilo;
@ -574,7 +575,8 @@ tex_copy_region(struct ilo_blitter *blitter,
if (dst->separate_s8 || src->separate_s8)
return false;
if (dst->bo_stride > max_extent || src->bo_stride > max_extent)
if (dst->layout.bo_stride > max_extent ||
src->layout.bo_stride > max_extent)
return false;
cpp = desc->block.bits / 8;
@ -605,21 +607,23 @@ tex_copy_region(struct ilo_blitter *blitter,
}
swctrl = ilo_blitter_blt_begin(blitter, src_box->depth * 8,
dst->bo, dst->tiling, src->bo, src->tiling);
dst->bo, dst->layout.tiling, src->bo, src->layout.tiling);
for (slice = 0; slice < src_box->depth; slice++) {
const struct ilo_texture_slice *dst_slice =
ilo_texture_get_slice(dst, dst_level, dst_z + slice);
const struct ilo_texture_slice *src_slice =
ilo_texture_get_slice(src, src_level, src_box->z + slice);
unsigned x1, y1, x2, y2, src_x, src_y;
x1 = (dst_slice->x + dst_x) * xscale;
y1 = dst_slice->y + dst_y;
ilo_layout_get_slice_pos(&dst->layout,
dst_level, dst_z + slice, &x1, &y1);
x1 = (x1 + dst_x) * xscale;
y1 = y1 + dst_y;
x2 = (x1 + src_box->width) * xscale;
y2 = y1 + src_box->height;
src_x = (src_slice->x + src_box->x) * xscale;
src_y = src_slice->y + src_box->y;
ilo_layout_get_slice_pos(&src->layout,
src_level, src_box->z + slice, &src_x, &src_y);
src_x = (src_x + src_box->x) * xscale;
src_y += src_box->y;
/* in blocks */
x1 /= desc->block.width;
@ -635,9 +639,9 @@ tex_copy_region(struct ilo_blitter *blitter,
break;
gen6_emit_XY_SRC_COPY_BLT(ilo->dev,
dst->bo, dst->tiling, dst->bo_stride, 0,
dst->bo, dst->layout.tiling, dst->layout.bo_stride, 0,
x1, y1, x2, y2,
src->bo, src->tiling, src->bo_stride, 0,
src->bo, src->layout.tiling, src->layout.bo_stride, 0,
src_x, src_y, rop, mask, mask,
ilo->cp);
}

12
src/gallium/drivers/ilo/ilo_blitter_rectlist.c
View File

@ -173,11 +173,13 @@ ilo_blitter_set_dsa(struct ilo_blitter *blitter,
static void
ilo_blitter_set_fb(struct ilo_blitter *blitter,
const struct pipe_resource *res, unsigned level,
struct pipe_resource *res, unsigned level,
const struct ilo_surface_cso *cso)
{
blitter->fb.width = u_minify(res->width0, level);
blitter->fb.height = u_minify(res->height0, level);
struct ilo_texture *tex = ilo_texture(res);
blitter->fb.width = u_minify(tex->layout.width0, level);
blitter->fb.height = u_minify(tex->layout.height0, level);
blitter->fb.num_samples = res->nr_samples;
if (!blitter->fb.num_samples)
@ -375,7 +377,7 @@ hiz_can_clear_zs(const struct ilo_blitter *blitter,
* The truth is when HiZ is enabled, separate stencil is also enabled on
* all GENs. The depth buffer format cannot be combined depth/stencil.
*/
switch (tex->bo_format) {
switch (tex->layout.format) {
case PIPE_FORMAT_Z16_UNORM:
if (blitter->ilo->dev->gen == ILO_GEN(6) && tex->base.width0 % 16)
return false;
@ -410,7 +412,7 @@ ilo_blitter_rectlist_clear_zs(struct ilo_blitter *blitter,
if (!hiz_can_clear_zs(blitter, tex))
return false;
clear_value = util_pack_z(tex->bo_format, depth);
clear_value = util_pack_z(tex->layout.format, depth);
ilo_blit_resolve_surface(blitter->ilo, zs,
ILO_TEXTURE_RENDER_WRITE | ILO_TEXTURE_CLEAR);

47
src/gallium/drivers/ilo/ilo_gpe_gen6.c
View File

@ -1075,11 +1075,11 @@ zs_init_info(const struct ilo_dev_info *dev,
if (format != PIPE_FORMAT_S8_UINT) {
info->zs.bo = tex->bo;
info->zs.stride = tex->bo_stride;
info->zs.tiling = tex->tiling;
info->zs.stride = tex->layout.bo_stride;
info->zs.tiling = tex->layout.tiling;
if (offset_to_layer) {
info->zs.offset = ilo_texture_get_slice_offset(tex,
info->zs.offset = ilo_layout_get_slice_tile_offset(&tex->layout,
level, first_layer, &x_offset[0], &y_offset[0]);
}
}
@ -1096,22 +1096,23 @@ zs_init_info(const struct ilo_dev_info *dev,
* "The pitch must be set to 2x the value computed based on width,
* as the stencil buffer is stored with two rows interleaved."
*
* According to the classic driver, we need to do the same for GEN7+
* even though the Ivy Bridge PRM does not say anything about it.
* For GEN7, we still dobule the stride because we did not double the
* slice widths when initializing the layout.
*/
info->stencil.stride = s8_tex->bo_stride * 2;
info->stencil.stride = s8_tex->layout.bo_stride * 2;
info->stencil.tiling = s8_tex->tiling;
info->stencil.tiling = s8_tex->layout.tiling;
if (offset_to_layer) {
info->stencil.offset = ilo_texture_get_slice_offset(s8_tex,
level, first_layer, &x_offset[1], &y_offset[1]);
info->stencil.offset =
ilo_layout_get_slice_tile_offset(&s8_tex->layout,
level, first_layer, &x_offset[1], &y_offset[1]);
}
}
if (ilo_texture_can_enable_hiz(tex, level, first_layer, num_layers)) {
info->hiz.bo = tex->hiz.bo;
info->hiz.stride = tex->hiz.bo_stride;
info->hiz.bo = tex->aux_bo;
info->hiz.stride = tex->layout.aux_stride;
info->hiz.tiling = INTEL_TILING_Y;
/*
@ -1128,8 +1129,8 @@ zs_init_info(const struct ilo_dev_info *dev,
}
}
info->width = tex->base.width0;
info->height = tex->base.height0;
info->width = tex->layout.width0;
info->height = tex->layout.height0;
info->depth = (tex->base.target == PIPE_TEXTURE_3D) ?
tex->base.depth0 : num_layers;
@ -1934,11 +1935,11 @@ ilo_gpe_init_view_surface_for_texture_gen6(const struct ilo_dev_info *dev,
surface_format = ilo_translate_texture_format(dev, format);
assert(surface_format >= 0);
width = tex->base.width0;
height = tex->base.height0;
width = tex->layout.width0;
height = tex->layout.height0;
depth = (tex->base.target == PIPE_TEXTURE_3D) ?
tex->base.depth0 : num_layers;
pitch = tex->bo_stride;
pitch = tex->layout.bo_stride;
if (surface_type == GEN6_SURFTYPE_CUBE) {
/*
@ -1992,10 +1993,10 @@ ilo_gpe_init_view_surface_for_texture_gen6(const struct ilo_dev_info *dev,
}
/* non-full array spacing is supported only on GEN7+ */
assert(tex->array_spacing_full);
assert(tex->layout.walk != ILO_LAYOUT_WALK_LOD);
/* non-interleaved samples are supported only on GEN7+ */
if (tex->base.nr_samples > 1)
assert(tex->interleaved);
assert(tex->layout.interleaved_samples);
if (is_rt) {
assert(num_levels == 1);
@ -2014,7 +2015,7 @@ ilo_gpe_init_view_surface_for_texture_gen6(const struct ilo_dev_info *dev,
/* we lose the capability for layered rendering */
assert(is_rt && num_layers == 1);
layer_offset = ilo_texture_get_slice_offset(tex,
layer_offset = ilo_layout_get_slice_tile_offset(&tex->layout,
first_level, first_layer, &x_offset, &y_offset);
assert(x_offset % 4 == 0);
@ -2056,7 +2057,7 @@ ilo_gpe_init_view_surface_for_texture_gen6(const struct ilo_dev_info *dev,
*
* "For linear surfaces, this field (X Offset) must be zero"
*/
if (tex->tiling == INTEL_TILING_NONE) {
if (tex->layout.tiling == INTEL_TILING_NONE) {
if (is_rt) {
const int elem_size = util_format_get_blocksize(format);
assert(layer_offset % elem_size == 0);
@ -2089,7 +2090,7 @@ ilo_gpe_init_view_surface_for_texture_gen6(const struct ilo_dev_info *dev,
dw[3] = (depth - 1) << GEN6_SURFACE_DW3_DEPTH__SHIFT |
(pitch - 1) << GEN6_SURFACE_DW3_PITCH__SHIFT |
ilo_gpe_gen6_translate_winsys_tiling(tex->tiling);
ilo_gpe_gen6_translate_winsys_tiling(tex->layout.tiling);
dw[4] = first_level << GEN6_SURFACE_DW4_MIN_LOD__SHIFT |
first_layer << 17 |
@ -2099,7 +2100,9 @@ ilo_gpe_init_view_surface_for_texture_gen6(const struct ilo_dev_info *dev,
dw[5] = x_offset << GEN6_SURFACE_DW5_X_OFFSET__SHIFT |
y_offset << GEN6_SURFACE_DW5_Y_OFFSET__SHIFT;
if (tex->valign_4)
assert(tex->layout.align_j == 2 || tex->layout.align_j == 4);
if (tex->layout.align_j == 4)
dw[5] |= GEN6_SURFACE_DW5_VALIGN_4;
/* do not increment reference count */

27
src/gallium/drivers/ilo/ilo_gpe_gen7.c
View File

@ -452,11 +452,11 @@ ilo_gpe_init_view_surface_for_texture_gen7(const struct ilo_dev_info *dev,
surface_format = ilo_translate_texture_format(dev, format);
assert(surface_format >= 0);
width = tex->base.width0;
height = tex->base.height0;
width = tex->layout.width0;
height = tex->layout.height0;
depth = (tex->base.target == PIPE_TEXTURE_3D) ?
tex->base.depth0 : num_layers;
pitch = tex->bo_stride;
pitch = tex->layout.bo_stride;
if (surface_type == GEN6_SURFTYPE_CUBE) {
/*
@ -522,7 +522,7 @@ ilo_gpe_init_view_surface_for_texture_gen7(const struct ilo_dev_info *dev,
/* we lose the capability for layered rendering */
assert(is_rt && num_layers == 1);
layer_offset = ilo_texture_get_slice_offset(tex,
layer_offset = ilo_layout_get_slice_tile_offset(&tex->layout,
first_level, first_layer, &x_offset, &y_offset);
assert(x_offset % 4 == 0);
@ -569,7 +569,7 @@ ilo_gpe_init_view_surface_for_texture_gen7(const struct ilo_dev_info *dev,
*
* "For linear surfaces, this field (X Offset) must be zero."
*/
if (tex->tiling == INTEL_TILING_NONE) {
if (tex->layout.tiling == INTEL_TILING_NONE) {
if (is_rt) {
const int elem_size = util_format_get_blocksize(format);
assert(layer_offset % elem_size == 0);
@ -584,7 +584,7 @@ ilo_gpe_init_view_surface_for_texture_gen7(const struct ilo_dev_info *dev,
dw[0] = surface_type << GEN7_SURFACE_DW0_TYPE__SHIFT |
surface_format << GEN7_SURFACE_DW0_FORMAT__SHIFT |
ilo_gpe_gen6_translate_winsys_tiling(tex->tiling) << 13;
ilo_gpe_gen6_translate_winsys_tiling(tex->layout.tiling) << 13;
/*
* From the Ivy Bridge PRM, volume 4 part 1, page 63:
@ -604,16 +604,19 @@ ilo_gpe_init_view_surface_for_texture_gen7(const struct ilo_dev_info *dev,
assert(depth == 1);
}
if (tex->valign_4)
assert(tex->layout.align_i == 4 || tex->layout.align_i == 8);
assert(tex->layout.align_j == 2 || tex->layout.align_j == 4);
if (tex->layout.align_j == 4)
dw[0] |= GEN7_SURFACE_DW0_VALIGN_4;
if (tex->halign_8)
if (tex->layout.align_i == 8)
dw[0] |= GEN7_SURFACE_DW0_HALIGN_8;
if (tex->array_spacing_full)
dw[0] |= GEN7_SURFACE_DW0_ARYSPC_FULL;
else
if (tex->layout.walk == ILO_LAYOUT_WALK_LOD)
dw[0] |= GEN7_SURFACE_DW0_ARYSPC_LOD0;
else
dw[0] |= GEN7_SURFACE_DW0_ARYSPC_FULL;
if (is_rt)
dw[0] |= GEN7_SURFACE_DW0_RENDER_CACHE_RW;
@ -637,7 +640,7 @@ ilo_gpe_init_view_surface_for_texture_gen7(const struct ilo_dev_info *dev,
* means the samples are interleaved. The layouts are the same when the
* number of samples is 1.
*/
if (tex->interleaved && tex->base.nr_samples > 1) {
if (tex->layout.interleaved_samples && tex->base.nr_samples > 1) {
assert(!is_rt);
dw[4] |= GEN7_SURFACE_DW4_MSFMT_DEPTH_STENCIL;
}

1397
src/gallium/drivers/ilo/ilo_resource.c
View File

File diff suppressed because it is too large Load Diff

54
src/gallium/drivers/ilo/ilo_resource.h
View File

@ -31,6 +31,7 @@
#include "intel_winsys.h"
#include "ilo_common.h"
#include "ilo_layout.h"
#include "ilo_screen.h"
enum ilo_texture_flags {
@ -87,8 +88,6 @@ struct ilo_buffer {
* A 3D image slice, cube face, or array layer.
*/
struct ilo_texture_slice {
/* 2D offset to the slice */
unsigned x, y;
unsigned flags;
/*
@ -109,32 +108,15 @@ struct ilo_texture {
bool imported;
enum pipe_format bo_format;
struct ilo_layout layout;
/* XXX thread-safety */
struct intel_bo *bo;
enum intel_tiling_mode tiling;
unsigned long bo_stride; /* distance between two block rows in bytes */
unsigned long bo_height;
unsigned block_width;
unsigned block_height;
unsigned block_size;
/* true if the mip level alignments are stricter */
bool halign_8, valign_4;
/* true if space is reserved between layers */
bool array_spacing_full;
/* true if samples are interleaved */
bool interleaved;
struct ilo_texture_slice *slices[PIPE_MAX_TEXTURE_LEVELS];
struct ilo_texture *separate_s8;
struct intel_bo *aux_bo;
struct {
struct intel_bo *bo;
unsigned long bo_stride;
} hiz;
struct ilo_texture *separate_s8;
};
static inline struct ilo_buffer *
@ -181,11 +163,6 @@ ilo_texture_get_slice(const struct ilo_texture *tex,
return &tex->slices[level][slice];
}
unsigned
ilo_texture_get_slice_offset(const struct ilo_texture *tex,
unsigned level, unsigned slice,
unsigned *x_offset, unsigned *y_offset);
static inline void
ilo_texture_set_slice_flags(struct ilo_texture *tex, unsigned level,
unsigned first_slice, unsigned num_slices,
@ -222,25 +199,14 @@ static inline bool
ilo_texture_can_enable_hiz(const struct ilo_texture *tex, unsigned level,
unsigned first_slice, unsigned num_slices)
{
const struct ilo_screen *is = ilo_screen(tex->base.screen);
const struct ilo_texture_slice *slice =
ilo_texture_get_slice(tex, level, first_slice);
if (!tex->hiz.bo)
return false;
/* we can adjust 3DSTATE_DEPTH_BUFFER for the first slice */
if (level == 0 && first_slice == 0 && num_slices == 1)
return true;
/* HiZ is non-mipmapped and non-array on GEN6 */
assert(is->dev.gen > ILO_GEN(6));
/*
* Either all or none of the slices in the same level have ILO_TEXTURE_HIZ
* set. It suffices to check only the first slice.
*/
return (slice->flags & ILO_TEXTURE_HIZ);
const struct ilo_texture_slice *slice =
ilo_texture_get_slice(tex, level, 0);
return (tex->aux_bo && (slice->flags & ILO_TEXTURE_HIZ));
}
#endif /* ILO_RESOURCE_H */

2
src/gallium/drivers/ilo/ilo_state.c
View File

@ -924,7 +924,7 @@ ilo_create_sampler_view(struct pipe_context *pipe,
struct ilo_texture *tex = ilo_texture(res);
/* warn about degraded performance because of a missing binding flag */
if (tex->tiling == INTEL_TILING_NONE &&
if (tex->layout.tiling == INTEL_TILING_NONE &&
!(tex->base.bind & PIPE_BIND_SAMPLER_VIEW)) {
ilo_warn("creating sampler view for a resource "
"not created for sampling\n");

100
src/gallium/drivers/ilo/ilo_transfer.c
View File

@ -92,9 +92,9 @@ resource_get_transfer_method(struct pipe_resource *res, unsigned usage,
bool need_convert = true;
/* we may need to convert on the fly */
if (tex->separate_s8 || tex->bo_format == PIPE_FORMAT_S8_UINT)
if (tex->separate_s8 || tex->layout.format == PIPE_FORMAT_S8_UINT)
m = ILO_TRANSFER_MAP_SW_ZS;
else if (tex->bo_format != tex->base.format)
else if (tex->layout.format != tex->base.format)
m = ILO_TRANSFER_MAP_SW_CONVERT;
else
need_convert = false;
@ -107,7 +107,7 @@ resource_get_transfer_method(struct pipe_resource *res, unsigned usage,
return true;
}
tiled = (tex->tiling != INTEL_TILING_NONE);
tiled = (tex->layout.tiling != INTEL_TILING_NONE);
}
if (tiled)
@ -194,8 +194,10 @@ xfer_alloc_staging_res(struct ilo_transfer *xfer)
xfer->staging.res = res->screen->resource_create(res->screen, &templ);
if (xfer->staging.res && xfer->staging.res->target != PIPE_BUFFER)
assert(ilo_texture(xfer->staging.res)->tiling == INTEL_TILING_NONE);
if (xfer->staging.res && xfer->staging.res->target != PIPE_BUFFER) {
assert(ilo_texture(xfer->staging.res)->layout.tiling ==
INTEL_TILING_NONE);
}
return (xfer->staging.res != NULL);
}
@ -344,17 +346,13 @@ tex_get_box_origin(const struct ilo_texture *tex,
const struct pipe_box *box,
unsigned *mem_x, unsigned *mem_y)
{
const struct ilo_texture_slice *s =
ilo_texture_get_slice(tex, level, slice + box->z);
unsigned x, y;
x = s->x + box->x;
y = s->y + box->y;
ilo_layout_get_slice_pos(&tex->layout, level, box->z + slice, &x, &y);
x += box->x;
y += box->y;
assert(x % tex->block_width == 0 && y % tex->block_height == 0);
*mem_x = x / tex->block_width * tex->block_size;
*mem_y = y / tex->block_height;
ilo_layout_pos_to_mem(&tex->layout, x, y, mem_x, mem_y);
}
static unsigned
@ -365,36 +363,13 @@ tex_get_box_offset(const struct ilo_texture *tex, unsigned level,
tex_get_box_origin(tex, level, 0, box, &mem_x, &mem_y);
return mem_y * tex->bo_stride + mem_x;
return ilo_layout_mem_to_linear(&tex->layout, mem_x, mem_y);
}
static unsigned
tex_get_slice_stride(const struct ilo_texture *tex, unsigned level)
{
const struct ilo_texture_slice *s0, *s1;
unsigned qpitch;
/* there is no 3D array texture */
assert(tex->base.array_size == 1 || tex->base.depth0 == 1);
if (tex->base.array_size == 1) {
/* non-array, non-3D */
if (tex->base.depth0 == 1)
return 0;
/* only the first level has a fixed slice stride */
if (level > 0) {
assert(!"no slice stride for 3D texture with level > 0");
return 0;
}
}
s0 = ilo_texture_get_slice(tex, level, 0);
s1 = ilo_texture_get_slice(tex, level, 1);
qpitch = s1->y - s0->y;
assert(qpitch % tex->block_height == 0);
return (qpitch / tex->block_height) * tex->bo_stride;
return ilo_layout_get_slice_stride(&tex->layout, level);
}
static unsigned
@ -542,22 +517,22 @@ static tex_tile_offset_func
tex_tile_choose_offset_func(const struct ilo_texture *tex,
unsigned *tiles_per_row)
{
switch (tex->tiling) {
switch (tex->layout.tiling) {
case INTEL_TILING_X:
*tiles_per_row = tex->bo_stride / 512;
*tiles_per_row = tex->layout.bo_stride / 512;
return tex_tile_x_offset;
case INTEL_TILING_Y:
*tiles_per_row = tex->bo_stride / 128;
*tiles_per_row = tex->layout.bo_stride / 128;
return tex_tile_y_offset;
case INTEL_TILING_NONE:
default:
/* W-tiling */
if (tex->bo_format == PIPE_FORMAT_S8_UINT) {
*tiles_per_row = tex->bo_stride / 64;
if (tex->layout.format == PIPE_FORMAT_S8_UINT) {
*tiles_per_row = tex->layout.bo_stride / 64;
return tex_tile_w_offset;
}
else {
*tiles_per_row = tex->bo_stride;
*tiles_per_row = tex->layout.bo_stride;
return tex_tile_none_offset;
}
}
@ -572,7 +547,8 @@ tex_staging_sys_map_bo(struct ilo_texture *tex,
const bool prefer_cpu = (is->dev.has_llc || for_read_back);
void *ptr;
if (prefer_cpu && (tex->tiling == INTEL_TILING_NONE || !linear_view))
if (prefer_cpu && (tex->layout.tiling == INTEL_TILING_NONE ||
!linear_view))
ptr = intel_bo_map(tex->bo, !for_read_back);
else
ptr = intel_bo_map_gtt(tex->bo);
@ -604,7 +580,7 @@ tex_staging_sys_zs_read(struct ilo_texture *tex,
tile_offset = tex_tile_choose_offset_func(tex, &tiles_per_row);
assert(tex->block_width == 1 && tex->block_height == 1);
assert(tex->layout.block_width == 1 && tex->layout.block_height == 1);
if (tex->separate_s8) {
struct ilo_texture *s8_tex = tex->separate_s8;
@ -622,7 +598,7 @@ tex_staging_sys_zs_read(struct ilo_texture *tex,
s8_tile_offset = tex_tile_choose_offset_func(s8_tex, &s8_tiles_per_row);
if (tex->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT) {
assert(tex->bo_format == PIPE_FORMAT_Z24X8_UNORM);
assert(tex->layout.format == PIPE_FORMAT_Z24X8_UNORM);
dst_cpp = 4;
dst_s8_pos = 3;
@ -630,7 +606,7 @@ tex_staging_sys_zs_read(struct ilo_texture *tex,
}
else {
assert(tex->base.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT);
assert(tex->bo_format == PIPE_FORMAT_Z32_FLOAT);
assert(tex->layout.format == PIPE_FORMAT_Z32_FLOAT);
dst_cpp = 8;
dst_s8_pos = 4;
@ -663,7 +639,7 @@ tex_staging_sys_zs_read(struct ilo_texture *tex,
d[dst_s8_pos] = s8_src[s8_offset];
d += dst_cpp;
x += tex->block_size;
x += tex->layout.block_size;
s8_x++;
}
@ -676,7 +652,7 @@ tex_staging_sys_zs_read(struct ilo_texture *tex,
tex_staging_sys_unmap_bo(s8_tex);
}
else {
assert(tex->bo_format == PIPE_FORMAT_S8_UINT);
assert(tex->layout.format == PIPE_FORMAT_S8_UINT);
for (slice = 0; slice < box->depth; slice++) {
unsigned mem_x, mem_y;
@ -731,7 +707,7 @@ tex_staging_sys_zs_write(struct ilo_texture *tex,
tile_offset = tex_tile_choose_offset_func(tex, &tiles_per_row);
assert(tex->block_width == 1 && tex->block_height == 1);
assert(tex->layout.block_width == 1 && tex->layout.block_height == 1);
if (tex->separate_s8) {
struct ilo_texture *s8_tex = tex->separate_s8;
@ -749,7 +725,7 @@ tex_staging_sys_zs_write(struct ilo_texture *tex,
s8_tile_offset = tex_tile_choose_offset_func(s8_tex, &s8_tiles_per_row);
if (tex->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT) {
assert(tex->bo_format == PIPE_FORMAT_Z24X8_UNORM);
assert(tex->layout.format == PIPE_FORMAT_Z24X8_UNORM);
src_cpp = 4;
src_s8_pos = 3;
@ -757,7 +733,7 @@ tex_staging_sys_zs_write(struct ilo_texture *tex,
}
else {
assert(tex->base.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT);
assert(tex->bo_format == PIPE_FORMAT_Z32_FLOAT);
assert(tex->layout.format == PIPE_FORMAT_Z32_FLOAT);
src_cpp = 8;
src_s8_pos = 4;
@ -790,7 +766,7 @@ tex_staging_sys_zs_write(struct ilo_texture *tex,
s8_dst[s8_offset] = s[src_s8_pos];
s += src_cpp;
x += tex->block_size;
x += tex->layout.block_size;
s8_x++;
}
@ -803,7 +779,7 @@ tex_staging_sys_zs_write(struct ilo_texture *tex,
tex_staging_sys_unmap_bo(s8_tex);
}
else {
assert(tex->bo_format == PIPE_FORMAT_S8_UINT);
assert(tex->layout.format == PIPE_FORMAT_S8_UINT);
for (slice = 0; slice < box->depth; slice++) {
unsigned mem_x, mem_y;
@ -861,9 +837,9 @@ tex_staging_sys_convert_write(struct ilo_texture *tex,
else
dst_slice_stride = 0;
if (unlikely(tex->bo_format == tex->base.format)) {
util_copy_box(dst, tex->bo_format, tex->bo_stride, dst_slice_stride,
0, 0, 0, box->width, box->height, box->depth,
if (unlikely(tex->layout.format == tex->base.format)) {
util_copy_box(dst, tex->layout.format, tex->layout.bo_stride,
dst_slice_stride, 0, 0, 0, box->width, box->height, box->depth,
xfer->staging.sys, xfer->base.stride, xfer->base.layer_stride,
0, 0, 0);
@ -874,14 +850,14 @@ tex_staging_sys_convert_write(struct ilo_texture *tex,
switch (tex->base.format) {
case PIPE_FORMAT_ETC1_RGB8:
assert(tex->bo_format == PIPE_FORMAT_R8G8B8X8_UNORM);
assert(tex->layout.format == PIPE_FORMAT_R8G8B8X8_UNORM);
for (slice = 0; slice < box->depth; slice++) {
const void *src =
xfer->staging.sys + xfer->base.layer_stride * slice;
util_format_etc1_rgb8_unpack_rgba_8unorm(dst,
tex->bo_stride, src, xfer->base.stride,
tex->layout.bo_stride, src, xfer->base.stride,
box->width, box->height);
dst += dst_slice_stride;
@ -977,7 +953,7 @@ tex_map(struct ilo_transfer *xfer)
ptr += tex_get_box_offset(tex, xfer->base.level, &xfer->base.box);
/* stride is for a block row, not a texel row */
xfer->base.stride = tex->bo_stride;
xfer->base.stride = tex->layout.bo_stride;
/* note that slice stride is not always available */
xfer->base.layer_stride = (xfer->base.box.depth > 1) ?
tex_get_slice_stride(tex, xfer->base.level) : 0;
@ -987,7 +963,7 @@ tex_map(struct ilo_transfer *xfer)
ptr = xfer_map(xfer);
if (ptr) {
const struct ilo_texture *staging = ilo_texture(xfer->staging.res);
xfer->base.stride = staging->bo_stride;
xfer->base.stride = staging->layout.bo_stride;
xfer->base.layer_stride = tex_get_slice_stride(staging, 0);
}
break;