intel: tools: update intel_aub.h
Scott added new stuff in IGT. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
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@ -49,6 +49,12 @@
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#define CMD_AUB (7 << 29)
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#define CMD_AUB_HEADER (CMD_AUB | (1 << 23) | (0x05 << 16))
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#define CMD_MEM_TRACE_REGISTER_POLL (CMD_AUB | (0x2e << 23) | (0x02 << 16))
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#define CMD_MEM_TRACE_REGISTER_WRITE (CMD_AUB | (0x2e << 23) | (0x03 << 16))
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#define CMD_MEM_TRACE_MEMORY_WRITE (CMD_AUB | (0x2e << 23) | (0x06 << 16))
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#define CMD_MEM_TRACE_VERSION (CMD_AUB | (0x2e << 23) | (0x0e << 16))
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/* DW1 */
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# define AUB_HEADER_MAJOR_SHIFT 24
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# define AUB_HEADER_MINOR_SHIFT 16
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@ -92,8 +98,28 @@
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#define AUB_TRACE_MEMTYPE_PCI (3 << 16)
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#define AUB_TRACE_MEMTYPE_GTT_ENTRY (4 << 16)
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#define AUB_MEM_TRACE_VERSION_FILE_VERSION 1
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/* DW2 */
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#define AUB_MEM_TRACE_VERSION_DEVICE_MASK 0x0000ff00
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#define AUB_MEM_TRACE_VERSION_DEVICE_CNL (15 << 8)
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#define AUB_MEM_TRACE_VERSION_METHOD_MASK 0x000c0000
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#define AUB_MEM_TRACE_VERSION_METHOD_PHY (1 << 18)
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#define AUB_MEM_TRACE_REGISTER_SIZE_MASK 0x000f0000
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#define AUB_MEM_TRACE_REGISTER_SIZE_DWORD (2 << 16)
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#define AUB_MEM_TRACE_REGISTER_SPACE_MASK 0xf0000000
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#define AUB_MEM_TRACE_REGISTER_SPACE_MMIO (0 << 28)
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/* DW3 */
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#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_MASK 0xf0000000
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#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL (1 << 28)
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#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT_ENTRY (4 << 28)
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/**
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* aub_state_struct_type enum values are encoded with the top 16 bits
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* representing the type to be delivered to the .aub file, and the bottom 16
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