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intel/fs: Write the address register with NoMask for MOV_INDIRECT 

This fixes a hang in the following Vulkan CTS test on TGL-LP:

    dEQP-VK.descriptor_indexing.storage_buffer_dynamic_in_loop

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
This commit is contained in:
Jason Ekstrand 2020-01-30 11:34:51 -06:00 committed by Marge Bot
parent 9a95abd0f7
commit f93dfb509c
1 changed files with 9 additions and 0 deletions
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9
src/intel/compiler/brw_fs_generator.cpp
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@ -452,8 +452,17 @@ fs_generator::generate_mov_indirect(fs_inst *inst,
* In the end, while base_offset is nice to look at in the generated
* code, using it saves us 0 instructions and would require quite a bit
* of case-by-case work. It's just not worth it.
*
* There's some sort of HW bug on Gen12 which causes issues if we write
* to the address register in control-flow. Since we only ever touch
* the address register from the generator, we can easily enough work
* around it by setting NoMask on the add.
*/
brw_push_insn_state(p);
if (devinfo->gen == 12)
brw_set_default_mask_control(p, BRW_MASK_DISABLE);
brw_ADD(p, addr, indirect_byte_offset, brw_imm_uw(imm_byte_offset));
brw_pop_insn_state(p);
brw_set_default_swsb(p, tgl_swsb_regdist(1));
if (type_sz(reg.type) > 4 &&