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radeonsi: move current_rast_prim to r600_common_context 

We'll use it in the scissors / clip / guardband state.

v2: avoid a performance regression on r600 when applied to
    (pre-fork) stable branches

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Nicolai Hähnle 2017-09-17 11:10:04 +02:00
parent 6f83085ec0
commit f86a112b07
5 changed files with 13 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/gallium/drivers/radeon/r600_pipe_common.c
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@ -724,6 +724,10 @@ bool si_common_context_init(struct r600_common_context *rctx,
rctx->dma_clear_buffer = r600_dma_clear_buffer_fallback;
rctx->b.buffer_subdata = si_buffer_subdata;
/* Set a reasonable default to avoid a performance regression in r600
* on stable branches. */
rctx->current_rast_prim = PIPE_PRIM_TRIANGLES;
if (rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 43) {
rctx->b.get_device_reset_status = r600_get_reset_status;
rctx->gpu_reset_counter =

1
src/gallium/drivers/radeon/r600_pipe_common.h
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@ -599,6 +599,7 @@ struct r600_common_context {
/* Additional context states. */
unsigned flags; /* flush flags */
enum pipe_prim_type current_rast_prim; /* primitive type after TES, GS */
/* Queries. */
/* Maintain the list of active queries for pausing between IBs. */

1
src/gallium/drivers/radeonsi/si_pipe.h
View File

@ -409,7 +409,6 @@ struct si_context {
unsigned last_sc_line_stipple;
unsigned current_vs_state;
unsigned last_vs_state;
enum pipe_prim_type current_rast_prim; /* primitive type after TES, GS */
/* Scratch buffer */
struct r600_atom scratch_state;

8
src/gallium/drivers/radeonsi/si_state_draw.c
View File

@ -531,7 +531,7 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
static void si_emit_rasterizer_prim_state(struct si_context *sctx)
{
struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
enum pipe_prim_type rast_prim = sctx->current_rast_prim;
enum pipe_prim_type rast_prim = sctx->b.current_rast_prim;
struct si_state_rasterizer *rs = sctx->emitted.named.rasterizer;
/* Skip this if not rendering lines. */
@ -581,7 +581,7 @@ static void si_emit_draw_registers(struct si_context *sctx,
{
struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
unsigned prim = si_conv_pipe_prim(info->mode);
unsigned gs_out_prim = si_conv_prim_to_gs_out(sctx->current_rast_prim);
unsigned gs_out_prim = si_conv_prim_to_gs_out(sctx->b.current_rast_prim);
unsigned ia_multi_vgt_param;
ia_multi_vgt_param = si_get_ia_multi_vgt_param(sctx, info, num_patches);
@ -1254,8 +1254,8 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
else
rast_prim = info->mode;
if (rast_prim != sctx->current_rast_prim) {
sctx->current_rast_prim = rast_prim;
if (rast_prim != sctx->b.current_rast_prim) {
sctx->b.current_rast_prim = rast_prim;
sctx->do_update_shaders = true;
}

8
src/gallium/drivers/radeonsi/si_state_shaders.c
View File

@ -1408,10 +1408,10 @@ static inline void si_shader_selector_key(struct pipe_context *ctx,
}
if (rs) {
bool is_poly = (sctx->current_rast_prim >= PIPE_PRIM_TRIANGLES &&
sctx->current_rast_prim <= PIPE_PRIM_POLYGON) ||
sctx->current_rast_prim >= PIPE_PRIM_TRIANGLES_ADJACENCY;
bool is_line = !is_poly && sctx->current_rast_prim != PIPE_PRIM_POINTS;
bool is_poly = (sctx->b.current_rast_prim >= PIPE_PRIM_TRIANGLES &&
sctx->b.current_rast_prim <= PIPE_PRIM_POLYGON) ||
sctx->b.current_rast_prim >= PIPE_PRIM_TRIANGLES_ADJACENCY;
bool is_line = !is_poly && sctx->b.current_rast_prim != PIPE_PRIM_POINTS;
key->part.ps.prolog.color_two_side = rs->two_side && sel->info.colors_read;
key->part.ps.prolog.flatshade_colors = rs->flatshade && sel->info.colors_read;