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i965: Remove unused PIPE_CONTROL defines. 

Both brw_defines.h and intel_reg.h defined PIPE_CONTROL fields, which
had similar names, but couldn't be used in the same way.  (One had
built-in shifts, and the other didn't...)

Delete the unused set to preserve sanity.

(Eric wrote an almost identical patch back in August, so I believe he
approves.)

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Kenneth Graunke 2013-12-11 21:53:27 -08:00
parent f8432832a7
commit f6b10544cd
1 changed files with 0 additions and 10 deletions
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10
src/mesa/drivers/dri/i965/brw_defines.h
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@ -38,14 +38,6 @@
/* 3D state:
*/
#define PIPE_CONTROL_NOWRITE 0x00
#define PIPE_CONTROL_WRITEIMMEDIATE 0x01
#define PIPE_CONTROL_WRITEDEPTH 0x02
#define PIPE_CONTROL_WRITETIMESTAMP 0x03
#define PIPE_CONTROL_GTTWRITE_PROCESS_LOCAL 0x00
#define PIPE_CONTROL_GTTWRITE_GLOBAL 0x01
#define CMD_3D_PRIM 0x7b00 /* 3DPRIMITIVE */
/* DW0 */
# define GEN4_3DPRIM_TOPOLOGY_TYPE_SHIFT 10
@ -1919,8 +1911,6 @@ enum brw_wm_barycentric_interp_mode {
/* DW2: start address */
/* DW3: end address. */
#define CMD_PIPE_CONTROL 0x7a00
#define CMD_MI_FLUSH 0x0200
#define GEN5_MI_REPORT_PERF_COUNT ((0x26 << 23) | (3 - 2))