freedreno: Document CP_UNK_A6XX_55
Reviewed-by: Rob Clark <robdclark@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3537>
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@ -3432,18 +3432,6 @@ with a better name.
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</reg32>
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</domain>
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<domain name="CP_UNK_A6XX_55" width="32">
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<reg32 offset="0" name="0">
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<bitfield name="BASE_LO" low="0" high="31"/>
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</reg32>
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<reg32 offset="1" name="1">
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<bitfield name="BASE_HI" low="0" high="16"/>
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</reg32>
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<reg32 offset="2" name="2">
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<bitfield name="SIZE" low="0" high="15"/>
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</reg32>
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</domain>
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<domain name="A6XX_PDC" width="32">
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<reg32 offset="0x1140" name="GPU_ENABLE_PDC"/>
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<reg32 offset="0x1148" name="GPU_SEQ_START_ADDR"/>
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@ -422,14 +422,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
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<value name="CP_WAIT_TWO_REGS" value="0x70" variants="A6XX"/>
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<value name="CP_MEMCPY" value="0x75" variants="A6XX"/>
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<value name="CP_SET_BIN_DATA5_OFFSET" value="0x2e" variants="A6XX"/>
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<!--
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unknown a6xx opcodes:
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opcode: (null) (14) (5 dwords)
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opcode: (null) (55) (4 dwords)
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opcode: (null) (6d) (4 dwords)
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-->
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<value name="CP_UNK_A6XX_55" value="0x55" variants="A6XX"/>
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<value name="CP_SET_CTXSWITCH_IB" value="0x55" variants="A6XX"/>
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<!--
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Seems to always have the payload:
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@ -1387,13 +1380,22 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
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<value value="4" name="RM6_GMEM"/>
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<value value="5" name="RM6_BLIT2D"/>
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<value value="6" name="RM6_RESOLVE"/>
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<value value="7" name="RM6_YIELD"/>
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<value value="0xc" name="RM6_BLIT2DSCALE"/>
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<!--
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These values come from a6xx_set_marker() in the
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downstream kernel, and they can only be set by the kernel
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-->
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<value value="0xd" name="RM6_IB1LIST_START"/>
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<value value="0xe" name="RM6_IB1LIST_END"/>
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<!-- IFPC - inter-frame power collapse -->
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<value value="0x100" name="RM6_IFPC_ENABLE"/>
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<value value="0x101" name="RM6_IFPC_DISABLE"/>
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</enum>
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<reg32 offset="0" name="0">
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<bitfield name="MARKER" low="0" high="3"/>
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<bitfield name="MODE" low="0" high="3" type="a6xx_render_mode"/>
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<!-- IFPC - inter-frame power collapse -->
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<bitfield name="IFPC" pos="8" type="boolean"/>
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<bitfield name="MODE" low="0" high="8" type="a6xx_render_mode"/>
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</reg32>
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</domain>
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@ -1507,5 +1509,54 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
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</reg32>
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</domain>
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<domain name="CP_SET_CTXSWITCH_IB" width="32">
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<doc>
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Used by the userspace driver to set various IB's which are
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executed during context save/restore for handling
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state that isn't restored by the
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context switch routine itself.
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</doc>
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<enum name="ctxswitch_ib">
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<value name="RESTORE_IB" value="0">
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<doc>Executed unconditionally when switching back to the context.</doc>
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</value>
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<value name="YIELD_RESTORE_IB" value="1">
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<doc>
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Executed when switching back after switching
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away during execution of
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a CP_SET_MARKER packet with RM6_YIELD as the
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payload *and* the normal save routine was
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bypassed for a shorter one. I think this is
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connected to the "skipsaverestore" bit set by
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the kernel when preempting.
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</doc>
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</value>
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<value name="SAVE_IB" value="2">
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<doc>
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Executed when switching away from the context,
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except for context switches initiated via
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CP_YIELD.
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</doc>
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</value>
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<value name="RB_SAVE_IB" value="3">
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<doc>
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This can only be set by the RB (i.e. the kernel)
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and executes with protected mode off, but
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is otherwise similar to SAVE_IB.
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</doc>
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</value>
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</enum>
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<reg32 offset="0" name="0">
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<bitfield name="ADDR_LO" low="0" high="31"/>
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</reg32>
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<reg32 offset="1" name="1">
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<bitfield name="ADDR_HI" low="0" high="31"/>
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</reg32>
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<reg32 offset="2" name="2">
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<bitfield name="DWORDS" low="0" high="19" type="uint"/>
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<bitfield name="TYPE" low="20" high="21" type="ctxswitch_ib"/>
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</reg32>
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</domain>
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</database>
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