intel/compiler: Expand untyped atomic message type field by a bit

This is necessary for a new Gen9 message type that will be added in the
next patch.  There are also Gen8 message types that need the extra bit
(mostly for bindless).

v2: Split off from the next patch.  Suggested by Caio.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
This commit is contained in:
Ian Romanick 2018-04-18 14:02:33 -07:00
parent d628642a34
commit f347348f8a
3 changed files with 9 additions and 4 deletions

View File

@ -406,7 +406,7 @@ static const char *const dp_dc0_msg_type_gen7[16] = {
[GEN7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write",
};
static const char *const dp_dc1_msg_type_hsw[16] = {
static const char *const dp_dc1_msg_type_hsw[32] = {
[HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read",
[HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op",
[HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] =

View File

@ -360,8 +360,13 @@ brw_dp_surface_desc(const struct gen_device_info *devinfo,
unsigned msg_control)
{
assert(devinfo->gen >= 7);
return (SET_BITS(msg_control, 13, 8) |
SET_BITS(msg_type, 17, 14));
if (devinfo->gen >= 8) {
return (SET_BITS(msg_control, 13, 8) |
SET_BITS(msg_type, 18, 14));
} else {
return (SET_BITS(msg_control, 13, 8) |
SET_BITS(msg_type, 17, 14));
}
}
/**

View File

@ -707,7 +707,7 @@ FF(dp_msg_type,
-1, -1, -1, -1, -1, -1,
/* 6: */ MD(16), MD(13),
/* 7: */ MD(17), MD(14),
/* 8: */ MD(17), MD(14))
/* 8: */ MD(18), MD(14))
FF(dp_msg_control,
/* 4: */ MD(11), MD( 8),
/* 4.5-5: use dp_read_msg_control or dp_write_msg_control */ -1, -1, -1, -1,