swr/rast: Use new processor detection mechanism
Use specific avx512 selection mechanism based on avx512er bit instead of getHostCPUName(). LLVM 6.0.0 has a bug that reports wrong string for KNL (fixed in 6.0.1). Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
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@ -80,7 +80,55 @@ JitManager::JitManager(uint32_t simdWidth, const char *arch, const char* core)
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StringRef hostCPUName;
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hostCPUName = sys::getHostCPUName();
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// force JIT to use the same CPU arch as the rest of swr
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if(mArch.AVX512F())
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{
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#if USE_SIMD16_SHADERS
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if(mArch.AVX512ER())
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{
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hostCPUName = StringRef("knl");
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}
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else
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{
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hostCPUName = StringRef("skylake-avx512");
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}
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mUsingAVX512 = true;
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#else
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hostCPUName = StringRef("core-avx2");
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#endif
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if (mVWidth == 0)
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{
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mVWidth = 8;
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}
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}
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else if(mArch.AVX2())
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{
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hostCPUName = StringRef("core-avx2");
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if (mVWidth == 0)
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{
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mVWidth = 8;
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}
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}
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else if(mArch.AVX())
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{
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if (mArch.F16C())
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{
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hostCPUName = StringRef("core-avx-i");
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}
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else
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{
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hostCPUName = StringRef("corei7-avx");
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}
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if (mVWidth == 0)
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{
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mVWidth = 8;
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}
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}
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else
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{
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SWR_INVALID("Jitting requires at least AVX ISA support");
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}
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auto optLevel = CodeGenOpt::Aggressive;
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@ -69,6 +69,7 @@ public:
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bool AVX2(void) { return bForceAVX ? 0 : InstructionSet::AVX2(); }
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bool AVX512F(void) { return (bForceAVX | bForceAVX2) ? 0 : InstructionSet::AVX512F(); }
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bool AVX512ER(void) { return (bForceAVX | bForceAVX2) ? 0 : InstructionSet::AVX512ER(); }
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bool BMI2(void) { return bForceAVX ? 0 : InstructionSet::BMI2(); }
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private:
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@ -142,6 +143,7 @@ struct JitManager
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uint32_t mVWidth;
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bool mUsingAVX512 = false;
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// fetch shader types
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llvm::FunctionType* mFetchShaderTy;
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