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i965/fs: Add byte scattered write message and fs support 

v2: (Jason Ekstrand)
    - Enable bit_size parameter to scattered messages to enable different
      bitsizes byte/word/dword.
    - Remove use of brw_send_indirect_scattered_message in favor of
      brw_send_indirect_surface_message.
    - Move scattered messages to surface messages namespace.
    - Assert align1 for scattered messages and assume Gen8+.
    - Inline brw_set_dp_byte_scattered_write.
v3: - Remove leftover newline (Topi Pohjolainen)
    - Rename brw_data_size to brw_scattered_data_element and use
      defines instead of an enum (Jason Ekstrand)
    - Assert scattered write for Gen8+ and Haswell (Jason Ekstrand)

Signed-off-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Jose Maria Casanova Crespo 2017-07-01 08:16:01 +02:00
parent d038deaa40
commit f1a9936ee1
9 changed files with 118 additions and 0 deletions
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7
src/intel/compiler/brw_eu.h
View File

@ -485,6 +485,13 @@ brw_typed_surface_write(struct brw_codegen *p,
unsigned msg_length,
unsigned num_channels);
void
brw_byte_scattered_write(struct brw_codegen *p,
struct brw_reg payload,
struct brw_reg surface,
unsigned msg_length,
unsigned bit_size);
void
brw_memory_fence(struct brw_codegen *p,
struct brw_reg dst);

20
src/intel/compiler/brw_eu_defines.h
View File

@ -402,6 +402,16 @@ enum opcode {
SHADER_OPCODE_RND_MODE,
/**
* Byte scattered write/read opcodes.
*
* LOGICAL opcodes are eventually translated to the matching non-LOGICAL
* opcode, but instead of taking a single payload blog they expect their
* arguments separately as individual sources, like untyped write/read.
*/
SHADER_OPCODE_BYTE_SCATTERED_WRITE,
SHADER_OPCODE_BYTE_SCATTERED_WRITE_LOGICAL,
SHADER_OPCODE_MEMORY_FENCE,
SHADER_OPCODE_GEN4_SCRATCH_READ,
@ -1255,4 +1265,14 @@ enum PACKED brw_rnd_mode {
BRW_RND_MODE_UNSPECIFIED, /* Unspecified rounding mode */
};
/* MDC_DS - Data Size Message Descriptor Control Field
* Skylake PRM, Volume 2d, page 129
*
* Specifies the number of Bytes to be read or written per Dword used at
* byte_scattered read/write and byte_scaled read/write messages.
*/
#define GEN7_BYTE_SCATTERED_DATA_ELEMENT_BYTE 0
#define GEN7_BYTE_SCATTERED_DATA_ELEMENT_WORD 1
#define GEN7_BYTE_SCATTERED_DATA_ELEMENT_DWORD 2
#endif /* BRW_EU_DEFINES_H */

44
src/intel/compiler/brw_eu_emit.c
View File

@ -2983,6 +2983,50 @@ brw_untyped_surface_write(struct brw_codegen *p,
p, insn, num_channels);
}
static unsigned
brw_byte_scattered_data_element_from_bit_size(unsigned bit_size)
{
switch (bit_size) {
case 8:
return GEN7_BYTE_SCATTERED_DATA_ELEMENT_BYTE;
case 16:
return GEN7_BYTE_SCATTERED_DATA_ELEMENT_WORD;
case 32:
return GEN7_BYTE_SCATTERED_DATA_ELEMENT_DWORD;
default:
unreachable("Unsupported bit_size for byte scattered messages");
}
}
void
brw_byte_scattered_write(struct brw_codegen *p,
struct brw_reg payload,
struct brw_reg surface,
unsigned msg_length,
unsigned bit_size)
{
const struct gen_device_info *devinfo = p->devinfo;
assert(devinfo->gen > 7 || devinfo->is_haswell);
assert(brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_1);
const unsigned sfid = GEN7_SFID_DATAPORT_DATA_CACHE;
struct brw_inst *insn = brw_send_indirect_surface_message(
p, sfid, brw_writemask(brw_null_reg(), WRITEMASK_XYZW),
payload, surface, msg_length, 0, true);
unsigned msg_control =
brw_byte_scattered_data_element_from_bit_size(bit_size) << 2;
if (brw_inst_exec_size(devinfo, p->current) == BRW_EXECUTE_16)
msg_control |= 1;
else
msg_control |= 0;
brw_inst_set_dp_msg_type(devinfo, insn,
HSW_DATAPORT_DC_PORT0_BYTE_SCATTERED_WRITE);
brw_inst_set_dp_msg_control(devinfo, insn, msg_control);
}
static void
brw_set_dp_typed_atomic_message(struct brw_codegen *p,
struct brw_inst *insn,

14
src/intel/compiler/brw_fs.cpp
View File

@ -250,6 +250,7 @@ fs_inst::is_send_from_grf() const
case SHADER_OPCODE_UNTYPED_ATOMIC:
case SHADER_OPCODE_UNTYPED_SURFACE_READ:
case SHADER_OPCODE_UNTYPED_SURFACE_WRITE:
case SHADER_OPCODE_BYTE_SCATTERED_WRITE:
case SHADER_OPCODE_TYPED_ATOMIC:
case SHADER_OPCODE_TYPED_SURFACE_READ:
case SHADER_OPCODE_TYPED_SURFACE_WRITE:
@ -749,6 +750,11 @@ fs_inst::components_read(unsigned i) const
else
return 1;
case SHADER_OPCODE_BYTE_SCATTERED_WRITE_LOGICAL:
assert(src[3].file == IMM &&
src[4].file == IMM);
return 1;
case SHADER_OPCODE_UNTYPED_ATOMIC_LOGICAL:
case SHADER_OPCODE_TYPED_ATOMIC_LOGICAL: {
assert(src[3].file == IMM &&
@ -791,6 +797,7 @@ fs_inst::size_read(int arg) const
case SHADER_OPCODE_TYPED_SURFACE_READ:
case SHADER_OPCODE_TYPED_SURFACE_WRITE:
case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET:
case SHADER_OPCODE_BYTE_SCATTERED_WRITE:
if (arg == 0)
return mlen * REG_SIZE;
break;
@ -4538,6 +4545,12 @@ fs_visitor::lower_logical_sends()
ibld.sample_mask_reg());
break;
case SHADER_OPCODE_BYTE_SCATTERED_WRITE_LOGICAL:
lower_surface_logical_send(ibld, inst,
SHADER_OPCODE_BYTE_SCATTERED_WRITE,
ibld.sample_mask_reg());
break;
case SHADER_OPCODE_UNTYPED_ATOMIC_LOGICAL:
lower_surface_logical_send(ibld, inst,
SHADER_OPCODE_UNTYPED_ATOMIC,
@ -5022,6 +5035,7 @@ get_lowered_simd_width(const struct gen_device_info *devinfo,
case SHADER_OPCODE_UNTYPED_ATOMIC_LOGICAL:
case SHADER_OPCODE_UNTYPED_SURFACE_READ_LOGICAL:
case SHADER_OPCODE_UNTYPED_SURFACE_WRITE_LOGICAL:
case SHADER_OPCODE_BYTE_SCATTERED_WRITE_LOGICAL:
return MIN2(16, inst->exec_size);
case SHADER_OPCODE_URB_READ_SIMD8:

2
src/intel/compiler/brw_fs_copy_propagation.cpp
View File

@ -655,6 +655,7 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
case SHADER_OPCODE_TYPED_ATOMIC:
case SHADER_OPCODE_TYPED_SURFACE_READ:
case SHADER_OPCODE_TYPED_SURFACE_WRITE:
case SHADER_OPCODE_BYTE_SCATTERED_WRITE:
/* We only propagate into the surface argument of the
* instruction. Everything else goes through LOAD_PAYLOAD.
*/
@ -694,6 +695,7 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
case SHADER_OPCODE_TYPED_ATOMIC_LOGICAL:
case SHADER_OPCODE_TYPED_SURFACE_READ_LOGICAL:
case SHADER_OPCODE_TYPED_SURFACE_WRITE_LOGICAL:
case SHADER_OPCODE_BYTE_SCATTERED_WRITE_LOGICAL:
inst->src[i] = val;
progress = true;
break;

6
src/intel/compiler/brw_fs_generator.cpp
View File

@ -2086,6 +2086,12 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
inst->mlen, src[2].ud);
break;
case SHADER_OPCODE_BYTE_SCATTERED_WRITE:
assert(src[2].file == BRW_IMMEDIATE_VALUE);
brw_byte_scattered_write(p, src[0], src[1],
inst->mlen, src[2].ud);
break;
case SHADER_OPCODE_TYPED_ATOMIC:
assert(src[2].file == BRW_IMMEDIATE_VALUE);
brw_typed_atomic(p, dst, src[0], src[1],

11
src/intel/compiler/brw_fs_surface_builder.cpp
View File

@ -160,6 +160,16 @@ namespace brw {
return emit_send(bld, SHADER_OPCODE_TYPED_ATOMIC_LOGICAL,
addr, tmp, surface, dims, op, rsize);
}
void
emit_byte_scattered_write(const fs_builder &bld, const fs_reg &surface,
const fs_reg &addr, const fs_reg &src,
unsigned dims, unsigned size,
unsigned bit_size, brw_predicate pred)
{
emit_send(bld, SHADER_OPCODE_BYTE_SCATTERED_WRITE_LOGICAL,
addr, src, surface, dims, bit_size, 0, pred);
}
}
}
@ -1192,3 +1202,4 @@ namespace brw {
}
}
}

7
src/intel/compiler/brw_fs_surface_builder.h
View File

@ -63,6 +63,13 @@ namespace brw {
const fs_reg &src0, const fs_reg &src1,
unsigned dims, unsigned rsize, unsigned op,
brw_predicate pred = BRW_PREDICATE_NONE);
void
emit_byte_scattered_write(const fs_builder &bld, const fs_reg &surface,
const fs_reg &addr, const fs_reg &src,
unsigned dims, unsigned size,
unsigned bit_size,
brw_predicate pred = BRW_PREDICATE_NONE);
}
namespace image_access {

7
src/intel/compiler/brw_shader.cpp
View File

@ -293,6 +293,11 @@ brw_instruction_name(const struct gen_device_info *devinfo, enum opcode op)
case SHADER_OPCODE_MEMORY_FENCE:
return "memory_fence";
case SHADER_OPCODE_BYTE_SCATTERED_WRITE:
return "byte_scattered_write";
case SHADER_OPCODE_BYTE_SCATTERED_WRITE_LOGICAL:
return "byte_scattered_write_logical";
case SHADER_OPCODE_LOAD_PAYLOAD:
return "load_payload";
case FS_OPCODE_PACK:
@ -963,6 +968,8 @@ backend_instruction::has_side_effects() const
case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
case SHADER_OPCODE_UNTYPED_SURFACE_WRITE:
case SHADER_OPCODE_UNTYPED_SURFACE_WRITE_LOGICAL:
case SHADER_OPCODE_BYTE_SCATTERED_WRITE:
case SHADER_OPCODE_BYTE_SCATTERED_WRITE_LOGICAL:
case SHADER_OPCODE_TYPED_ATOMIC:
case SHADER_OPCODE_TYPED_ATOMIC_LOGICAL:
case SHADER_OPCODE_TYPED_SURFACE_WRITE: