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intel/isl: Allow stencil buffer to support compression on Gen12+ 

v2: (Nanley Chery)
- Fix commit title
- Fix comment

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
This commit is contained in:
Sagar Ghuge 2019-10-15 14:13:29 -07:00
parent b22b349443
commit f0db4c5204
1 changed files with 3 additions and 2 deletions
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5
src/intel/isl/isl.c
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@ -1858,8 +1858,9 @@ isl_surf_get_ccs_surf(const struct isl_device *dev,
if (surf->usage & ISL_SURF_USAGE_DISABLE_AUX_BIT)
return false;
/* Callers don't yet support this configuration. */
if (isl_surf_usage_is_stencil(surf->usage))
/* Allow CCS for single-sampled stencil buffers Gen12+. */
if (isl_surf_usage_is_stencil(surf->usage) &&
(ISL_DEV_GEN(dev) < 12 || surf->samples > 1))
return false;
/* [TGL+] CCS can only be added to a non-D16-formatted depth buffer if it