swr/rast: Fetch compile state changes
Add ForceSequentialAccessEnable and InstanceIDOffsetEnable bools to FETCH_COMPILE_STATE. Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
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@ -275,6 +275,12 @@ Function* FetchJit::Create(const FETCH_COMPILE_STATE& fetchState)
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: JitGatherVertices(fetchState, streams, vIndices, pVtxOut);
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#endif
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if (fetchState.bInstanceIDOffsetEnable)
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{
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// TODO:
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SWR_ASSERT((0), "Add support for handling InstanceID Offset Enable.");
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}
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RET_VOID();
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JitManager::DumpToFile(fetch, "src");
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@ -107,6 +107,9 @@ struct FETCH_COMPILE_STATE
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bool bVertexIDOffsetEnable{ false }; // Offset vertexID by StartVertex for non-indexed draws or BaseVertex for indexed draws
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bool bPartialVertexBuffer{ false }; // for indexed draws, map illegal indices to a known resident vertex
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bool bForceSequentialAccessEnable{ false };
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bool bInstanceIDOffsetEnable{ false };
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FETCH_COMPILE_STATE(bool disableVGATHER = false, bool diableIndexOOBCheck = false):
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bDisableVGATHER(disableVGATHER), bDisableIndexOOBCheck(diableIndexOOBCheck){ };
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@ -120,11 +123,13 @@ struct FETCH_COMPILE_STATE
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if (cutIndex != other.cutIndex) return false;
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if (bVertexIDOffsetEnable != other.bVertexIDOffsetEnable) return false;
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if (bPartialVertexBuffer != other.bPartialVertexBuffer) return false;
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if (bForceSequentialAccessEnable != other.bForceSequentialAccessEnable) return false;
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if (bInstanceIDOffsetEnable != other.bInstanceIDOffsetEnable) return false;
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for(uint32_t i = 0; i < numAttribs; ++i)
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{
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if((layout[i].bits != other.layout[i].bits) ||
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((layout[i].InstanceEnable == 1) &&
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(((layout[i].InstanceEnable == 1) || (layout[i].InstanceStrideEnable == 1)) &&
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(layout[i].InstanceAdvancementState != other.layout[i].InstanceAdvancementState))){
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return false;
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}
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