gallium: Add support for 5551 with the 1-bit field in the low bit.

This is how VC4 stores 5551 textures, which we need to support for
GL_OES_required_internalformat.

v2: Extend commit message, fix svga driver build, add BE ordering from
    Roland.
v3: Rebase on PIPE_FORMAT_R10G10B10X2_UNORM addition.

Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v2)
This commit is contained in:
Eric Anholt 2017-05-01 11:16:20 -07:00
parent 3078296226
commit ef874ee450
4 changed files with 18 additions and 2 deletions

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@ -74,6 +74,8 @@ PIPE_FORMAT_X8B8G8R8_UNORM , plain, 1, 1, x8 , un8 , un8 , un8 , wzy1, r
PIPE_FORMAT_R8G8B8X8_UNORM , plain, 1, 1, un8 , un8 , un8 , x8 , xyz1, rgb
PIPE_FORMAT_B5G5R5X1_UNORM , plain, 1, 1, un5 , un5 , un5 , x1 , zyx1, rgb, x1 , un5 , un5 , un5 , yzw1
PIPE_FORMAT_B5G5R5A1_UNORM , plain, 1, 1, un5 , un5 , un5 , un1 , zyxw, rgb, un1 , un5 , un5 , un5 , yzwx
PIPE_FORMAT_X1B5G5R5_UNORM , plain, 1, 1, x1 , un5 , un5 , un5 , wzy1, rgb, un5 , un5 , un5 , x1 , xyz1
PIPE_FORMAT_A1B5G5R5_UNORM , plain, 1, 1, un1 , un5 , un5 , un5 , wzyx, rgb, un5 , un5 , un5 , un1 , xyzw
PIPE_FORMAT_B4G4R4A4_UNORM , plain, 1, 1, un4 , un4 , un4 , un4 , zyxw, rgb, un4 , un4 , un4 , un4 , yzwx
PIPE_FORMAT_B4G4R4X4_UNORM , plain, 1, 1, un4 , un4 , un4 , x4 , zyx1, rgb, x4 , un4 , un4 , un4 , yzw1
PIPE_FORMAT_B5G6R5_UNORM , plain, 1, 1, un5 , un6 , un5 , , zyx1, rgb, un5 , un6 , un5 , , xyz1

Can't render this file because it contains an unexpected character in line 8 and column 3.

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@ -58,6 +58,7 @@ static const struct vgpu10_format_entry format_conversion_table[] =
{ PIPE_FORMAT_A8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
{ PIPE_FORMAT_X8R8G8B8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
{ PIPE_FORMAT_B5G5R5A1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G5R5A1_UNORM, TF_GEN_MIPS },
{ PIPE_FORMAT_A1B5G5R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
{ PIPE_FORMAT_B4G4R4A4_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
{ PIPE_FORMAT_B5G6R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_B5G6R5_UNORM, TF_GEN_MIPS },
{ PIPE_FORMAT_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM, TF_GEN_MIPS },
@ -175,6 +176,7 @@ static const struct vgpu10_format_entry format_conversion_table[] =
{ PIPE_FORMAT_R5SG5SB6U_NORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
{ PIPE_FORMAT_A8B8G8R8_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
{ PIPE_FORMAT_B5G5R5X1_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
{ PIPE_FORMAT_X1B5G5R5_UNORM, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 },
{ PIPE_FORMAT_R10G10B10A2_USCALED, SVGA3D_R10G10B10A2_UNORM, SVGA3D_FORMAT_INVALID, VF_PUINT_TO_USCALED },
{ PIPE_FORMAT_R11G11B10_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R11G11B10_FLOAT, TF_GEN_MIPS },
{ PIPE_FORMAT_R9G9B9E5_FLOAT, SVGA3D_FORMAT_INVALID, SVGA3D_R9G9B9E5_SHAREDEXP, 0 },

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@ -392,6 +392,8 @@ enum pipe_format {
PIPE_FORMAT_P016 = 307,
PIPE_FORMAT_R10G10B10X2_UNORM = 308,
PIPE_FORMAT_A1B5G5R5_UNORM = 309,
PIPE_FORMAT_X1B5G5R5_UNORM = 310,
PIPE_FORMAT_COUNT
};

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@ -79,6 +79,8 @@ st_mesa_format_to_pipe_format(const struct st_context *st, mesa_format mesaForma
return PIPE_FORMAT_XRGB8888_UNORM;
case MESA_FORMAT_B5G5R5A1_UNORM:
return PIPE_FORMAT_B5G5R5A1_UNORM;
case MESA_FORMAT_A1B5G5R5_UNORM:
return PIPE_FORMAT_A1B5G5R5_UNORM;
case MESA_FORMAT_B4G4R4A4_UNORM:
return PIPE_FORMAT_B4G4R4A4_UNORM;
case MESA_FORMAT_B5G6R5_UNORM:
@ -409,6 +411,8 @@ st_mesa_format_to_pipe_format(const struct st_context *st, mesa_format mesaForma
return PIPE_FORMAT_B4G4R4X4_UNORM;
case MESA_FORMAT_B5G5R5X1_UNORM:
return PIPE_FORMAT_B5G5R5X1_UNORM;
case MESA_FORMAT_X1B5G5R5_UNORM:
return PIPE_FORMAT_X1B5G5R5_UNORM;
case MESA_FORMAT_R8G8B8X8_SNORM:
return PIPE_FORMAT_RGBX8888_SNORM;
case MESA_FORMAT_X8B8G8R8_SNORM:
@ -558,6 +562,8 @@ st_pipe_format_to_mesa_format(enum pipe_format format)
return MESA_FORMAT_X8R8G8B8_UNORM;
case PIPE_FORMAT_B5G5R5A1_UNORM:
return MESA_FORMAT_B5G5R5A1_UNORM;
case PIPE_FORMAT_A1B5G5R5_UNORM:
return MESA_FORMAT_A1B5G5R5_UNORM;
case PIPE_FORMAT_B4G4R4A4_UNORM:
return MESA_FORMAT_B4G4R4A4_UNORM;
case PIPE_FORMAT_B5G6R5_UNORM:
@ -890,6 +896,8 @@ st_pipe_format_to_mesa_format(enum pipe_format format)
return MESA_FORMAT_B4G4R4X4_UNORM;
case PIPE_FORMAT_B5G5R5X1_UNORM:
return MESA_FORMAT_B5G5R5X1_UNORM;
case PIPE_FORMAT_X1B5G5R5_UNORM:
return MESA_FORMAT_X1B5G5R5_UNORM;
case PIPE_FORMAT_RGBX8888_SNORM:
return MESA_FORMAT_R8G8B8X8_SNORM;
case PIPE_FORMAT_XBGR8888_SNORM:
@ -1150,7 +1158,8 @@ static const struct format_mapping format_map[] = {
},
{
{ GL_RGB5_A1, 0 },
{ PIPE_FORMAT_B5G5R5A1_UNORM, DEFAULT_RGBA_FORMATS }
{ PIPE_FORMAT_B5G5R5A1_UNORM, PIPE_FORMAT_A1B5G5R5_UNORM,
DEFAULT_RGBA_FORMATS }
},
{
{ GL_R3_G3_B2, 0 },
@ -1164,7 +1173,8 @@ static const struct format_mapping format_map[] = {
},
{
{ GL_RGB5 },
{ PIPE_FORMAT_B5G5R5X1_UNORM, PIPE_FORMAT_B5G5R5A1_UNORM,
{ PIPE_FORMAT_B5G5R5X1_UNORM, PIPE_FORMAT_X1B5G5R5_UNORM,
PIPE_FORMAT_B5G5R5A1_UNORM, PIPE_FORMAT_A1B5G5R5_UNORM,
DEFAULT_RGB_FORMATS }
},
{