radeonsi: stop using TGSI_PROPERTY_TES_SPACING
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
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@ -457,11 +457,6 @@ void si_nir_scan_shader(const struct nir_shader *nir, struct si_shader_info *inf
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info->stage = nir->info.stage;
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if (nir->info.stage == MESA_SHADER_TESS_EVAL) {
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STATIC_ASSERT((TESS_SPACING_EQUAL + 1) % 3 == PIPE_TESS_SPACING_EQUAL);
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STATIC_ASSERT((TESS_SPACING_FRACTIONAL_ODD + 1) % 3 == PIPE_TESS_SPACING_FRACTIONAL_ODD);
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STATIC_ASSERT((TESS_SPACING_FRACTIONAL_EVEN + 1) % 3 == PIPE_TESS_SPACING_FRACTIONAL_EVEN);
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info->properties[TGSI_PROPERTY_TES_SPACING] = (nir->info.tess.spacing + 1) % 3;
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info->properties[TGSI_PROPERTY_TES_VERTEX_ORDER_CW] = !nir->info.tess.ccw;
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if (info->base.tess.primitive_mode == GL_ISOLINES)
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@ -313,7 +313,7 @@ static void si_set_tesseval_regs(struct si_screen *sscreen, const struct si_shad
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{
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const struct si_shader_info *info = &tes->info;
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unsigned tes_prim_mode = info->base.tess.primitive_mode;
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unsigned tes_spacing = info->properties[TGSI_PROPERTY_TES_SPACING];
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unsigned tes_spacing = info->base.tess.spacing;
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bool tes_vertex_order_cw = info->properties[TGSI_PROPERTY_TES_VERTEX_ORDER_CW];
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bool tes_point_mode = info->base.tess.point_mode;
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unsigned type, partitioning, topology, distribution_mode;
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@ -334,13 +334,13 @@ static void si_set_tesseval_regs(struct si_screen *sscreen, const struct si_shad
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}
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switch (tes_spacing) {
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case PIPE_TESS_SPACING_FRACTIONAL_ODD:
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case TESS_SPACING_FRACTIONAL_ODD:
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partitioning = V_028B6C_PART_FRAC_ODD;
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break;
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case PIPE_TESS_SPACING_FRACTIONAL_EVEN:
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case TESS_SPACING_FRACTIONAL_EVEN:
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partitioning = V_028B6C_PART_FRAC_EVEN;
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break;
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case PIPE_TESS_SPACING_EQUAL:
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case TESS_SPACING_EQUAL:
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partitioning = V_028B6C_PART_INTEGER;
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break;
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default:
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@ -400,7 +400,7 @@ static void polaris_set_vgt_vertex_reuse(struct si_screen *sscreen, struct si_sh
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unsigned vtx_reuse_depth = 30;
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if (sel->info.stage == MESA_SHADER_TESS_EVAL &&
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sel->info.properties[TGSI_PROPERTY_TES_SPACING] == PIPE_TESS_SPACING_FRACTIONAL_ODD)
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sel->info.base.tess.spacing == TESS_SPACING_FRACTIONAL_ODD)
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vtx_reuse_depth = 14;
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assert(pm4->shader);
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