freedreno/a3xx: add support for point sprite coordinate replacement
This does not (yet) support different coordinate origins, so the tests still fail due to fbo flipping. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
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@ -158,6 +158,7 @@ fd3_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info)
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},
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.format = pipe_surface_format(pfb->cbufs[0]),
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.rasterflat = ctx->rasterizer && ctx->rasterizer->flatshade,
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.sprite_coord_enable = ctx->rasterizer ? ctx->rasterizer->sprite_coord_enable : 0,
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};
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unsigned dirty;
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@ -55,6 +55,8 @@ struct fd3_emit {
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struct ir3_shader_key key;
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enum pipe_format format;
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uint32_t dirty;
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uint32_t sprite_coord_enable;
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bool rasterflat;
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/* cached to avoid repeated lookups of same variants: */
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@ -468,6 +468,7 @@ fd3_emit_tile_mem2gmem(struct fd_context *ctx, struct fd_tile *tile)
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struct fd3_emit emit = {
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.vtx = &fd3_ctx->blit_vbuf_state,
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.prog = &ctx->blit_prog,
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.sprite_coord_enable = 1,
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.key = {
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.half_precision = fd3_half_precision(format),
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},
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@ -365,31 +365,40 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit)
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COND(vp->writes_psize, A3XX_VPC_ATTR_PSIZE));
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OUT_RING(ring, 0x00000000);
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} else {
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uint32_t vinterp[4], flatshade[2];
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uint32_t vinterp[4], flatshade[2], vpsrepl[4];
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memset(vinterp, 0, sizeof(vinterp));
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memset(flatshade, 0, sizeof(flatshade));
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memset(vpsrepl, 0, sizeof(vpsrepl));
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/* figure out VARYING_INTERP / FLAT_SHAD register values: */
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for (j = -1; (j = ir3_next_varying(fp, j)) < (int)fp->inputs_count; ) {
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uint32_t interp = fp->inputs[j].interpolate;
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/* TODO might be cleaner to just +8 in SP_VS_VPC_DST_REG
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* instead.. rather than -8 everywhere else..
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*/
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uint32_t inloc = fp->inputs[j].inloc - 8;
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/* currently assuming varyings aligned to 4 (not
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* packed):
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*/
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debug_assert((inloc % 4) == 0);
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if ((interp == TGSI_INTERPOLATE_CONSTANT) ||
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((interp == TGSI_INTERPOLATE_COLOR) && emit->rasterflat)) {
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/* TODO might be cleaner to just +8 in SP_VS_VPC_DST_REG
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* instead.. rather than -8 everywhere else..
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*/
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uint32_t loc = fp->inputs[j].inloc - 8;
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/* currently assuming varyings aligned to 4 (not
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* packed):
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*/
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debug_assert((loc % 4) == 0);
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uint32_t loc = inloc;
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for (i = 0; i < 4; i++, loc++) {
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vinterp[loc / 16] |= FLAT << ((loc % 16) * 2);
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flatshade[loc / 32] |= 1 << (loc % 32);
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}
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}
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/* TODO: Figure out if there's a way to make it spit out 0's and
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* 1's for the .z and .w components.
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*/
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if (emit->sprite_coord_enable & (1 << sem2idx(fp->inputs[j].semantic)))
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vpsrepl[inloc / 16] |= 0x09 << ((inloc % 16) * 2);
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}
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OUT_PKT0(ring, REG_A3XX_VPC_ATTR, 2);
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@ -407,10 +416,10 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit)
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OUT_RING(ring, vinterp[3]); /* VPC_VARYING_INTERP[3].MODE */
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OUT_PKT0(ring, REG_A3XX_VPC_VARYING_PS_REPL_MODE(0), 4);
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OUT_RING(ring, fp->shader->vpsrepl[0]); /* VPC_VARYING_PS_REPL[0].MODE */
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OUT_RING(ring, fp->shader->vpsrepl[1]); /* VPC_VARYING_PS_REPL[1].MODE */
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OUT_RING(ring, fp->shader->vpsrepl[2]); /* VPC_VARYING_PS_REPL[2].MODE */
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OUT_RING(ring, fp->shader->vpsrepl[3]); /* VPC_VARYING_PS_REPL[3].MODE */
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OUT_RING(ring, vpsrepl[0]); /* VPC_VARYING_PS_REPL[0].MODE */
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OUT_RING(ring, vpsrepl[1]); /* VPC_VARYING_PS_REPL[1].MODE */
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OUT_RING(ring, vpsrepl[2]); /* VPC_VARYING_PS_REPL[2].MODE */
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OUT_RING(ring, vpsrepl[3]); /* VPC_VARYING_PS_REPL[3].MODE */
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OUT_PKT0(ring, REG_A3XX_SP_FS_FLAT_SHAD_MODE_REG_0, 2);
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OUT_RING(ring, flatshade[0]); /* SP_FS_FLAT_SHAD_MODE_REG_0 */
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@ -436,19 +445,6 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit)
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}
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}
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/* hack.. until we figure out how to deal w/ vpsrepl properly.. */
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static void
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fix_blit_fp(struct pipe_context *pctx)
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{
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struct fd_context *ctx = fd_context(pctx);
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struct fd3_shader_stateobj *so = ctx->blit_prog.fp;
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so->shader->vpsrepl[0] = 0x99999999;
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so->shader->vpsrepl[1] = 0x99999999;
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so->shader->vpsrepl[2] = 0x99999999;
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so->shader->vpsrepl[3] = 0x99999999;
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}
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void
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fd3_prog_init(struct pipe_context *pctx)
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{
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@ -459,6 +455,4 @@ fd3_prog_init(struct pipe_context *pctx)
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pctx->delete_vs_state = fd3_vp_state_delete;
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fd_prog_init(pctx);
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fix_blit_fp(pctx);
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}
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