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genxml/gen11+: Add COMMON_SLICE_CHICKEN4 register 

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Anuj Phogat 2019-09-09 11:32:35 -07:00
parent 7e0e53a077
commit ee2bde5232
2 changed files with 10 additions and 0 deletions
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5
src/intel/genxml/gen11.xml
View File

@ -6914,6 +6914,11 @@
<field name="PS Thread Panic Dispatch Mask" start="22" end="23" type="uint"/>
</register>
<register name="COMMON_SLICE_CHICKEN4" length="1" num="0x7300">
<field name="Enable Hardware Filtering in WM" start="5" end="5" type="bool"/>
<field name="Enable Hardware Filtering in WM Mask" start="21" end="21" type="bool"/>
</register>
<register name="CS_CHICKEN1" length="1" num="0x2580">
<field name="Replay Mode" start="0" end="0" type="uint">
<value name="Mid-cmdbuffer Preemption" value="0"/>

5
src/intel/genxml/gen12.xml
View File

@ -6914,6 +6914,11 @@
<field name="PS Thread Panic Dispatch Mask" start="22" end="23" type="uint"/>
</register>
<register name="COMMON_SLICE_CHICKEN4" length="1" num="0x7300">
<field name="Enable Hardware Filtering in WM" start="5" end="5" type="bool"/>
<field name="Enable Hardware Filtering in WM Mask" start="21" end="21" type="bool"/>
</register>
<register name="CS_CHICKEN1" length="1" num="0x2580">
<field name="Replay Mode" start="0" end="0" type="uint">
<value name="Mid-cmdbuffer Preemption" value="0"/>