aco: allocate full register for subdword definitions if HW doesn't support it
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
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@ -1839,8 +1839,17 @@ void register_allocation(Program *program, std::vector<TempSet>& live_out_per_bl
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definition.setFixed(reg);
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}
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if (!definition.isFixed())
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definition.setFixed(get_reg(ctx, register_file, definition.getTemp(), parallelcopy, instr));
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if (!definition.isFixed()) {
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Temp tmp = definition.getTemp();
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/* subdword instructions before RDNA write full registers */
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if (tmp.regClass().is_subdword() &&
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!instr_can_access_subdword(instr) &&
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ctx.program->chip_class <= GFX9) {
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assert(tmp.bytes() <= 4);
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tmp = Temp(definition.tempId(), v1);
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}
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definition.setFixed(get_reg(ctx, register_file, tmp, parallelcopy, instr));
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}
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assert(definition.isFixed() && ((definition.getTemp().type() == RegType::vgpr && definition.physReg() >= 256) ||
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(definition.getTemp().type() != RegType::vgpr && definition.physReg() < 256)));
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@ -46,6 +46,11 @@ void perfwarn(bool cond, const char *msg, Instruction *instr)
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}
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#endif
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bool instr_can_access_subdword(aco_ptr<Instruction>& instr)
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{
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return instr->isSDWA() || instr->format == Format::PSEUDO;
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}
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void validate(Program* program, FILE * output)
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{
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if (!(debug_flags & DEBUG_VALIDATE))
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@ -162,7 +167,7 @@ void validate(Program* program, FILE * output)
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/* check subdword definitions */
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for (unsigned i = 0; i < instr->definitions.size(); i++) {
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if (instr->definitions[i].regClass().is_subdword())
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check(instr->isSDWA() || instr->format == Format::PSEUDO, "Only SDWA and Pseudo instructions can write subdword registers", instr.get());
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check(instr_can_access_subdword(instr) || instr->definitions[i].bytes() <= 4, "Only SDWA and Pseudo instructions can write subdword registers larger than 4 bytes", instr.get());
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}
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if (instr->isSALU() || instr->isVALU()) {
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@ -456,7 +461,7 @@ bool validate_ra(Program *program, const struct radv_nir_compiler_options *optio
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err |= ra_fail(output, loc, assignments.at(op.tempId()).firstloc, "Operand %d has an out-of-bounds register assignment", i);
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if (op.physReg() == vcc && !program->needs_vcc)
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err |= ra_fail(output, loc, Location(), "Operand %d fixed to vcc but needs_vcc=false", i);
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if (!(instr->isSDWA() || instr->format == Format::PSEUDO) && op.regClass().is_subdword() && op.physReg().byte())
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if (!instr_can_access_subdword(instr) && op.regClass().is_subdword() && op.physReg().byte())
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err |= ra_fail(output, loc, assignments.at(op.tempId()).firstloc, "Operand %d must be aligned to a full register", i);
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if (!assignments[op.tempId()].firstloc.block)
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assignments[op.tempId()].firstloc = loc;
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@ -477,6 +482,8 @@ bool validate_ra(Program *program, const struct radv_nir_compiler_options *optio
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err |= ra_fail(output, loc, assignments.at(def.tempId()).firstloc, "Definition %d has an out-of-bounds register assignment", i);
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if (def.physReg() == vcc && !program->needs_vcc)
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err |= ra_fail(output, loc, Location(), "Definition %d fixed to vcc but needs_vcc=false", i);
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if (!instr_can_access_subdword(instr) && def.regClass().is_subdword() && def.physReg().byte())
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err |= ra_fail(output, loc, assignments.at(def.tempId()).firstloc, "Definition %d must be aligned to a full register", i);
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if (!assignments[def.tempId()].firstloc.block)
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assignments[def.tempId()].firstloc = loc;
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assignments[def.tempId()].defloc = loc;
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@ -579,9 +586,14 @@ bool validate_ra(Program *program, const struct radv_nir_compiler_options *optio
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PhysReg reg = assignments.at(tmp.id()).reg;
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for (unsigned j = 0; j < tmp.bytes(); j++) {
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if (regs[reg.reg_b + j])
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err |= ra_fail(output, loc, assignments.at(regs[reg.reg_b + i]).defloc, "Assignment of element %d of %%%d already taken by %%%d from instruction", i, tmp.id(), regs[reg.reg_b + j]);
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err |= ra_fail(output, loc, assignments.at(regs[reg.reg_b + j]).defloc, "Assignment of element %d of %%%d already taken by %%%d from instruction", i, tmp.id(), regs[reg.reg_b + j]);
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regs[reg.reg_b + j] = tmp.id();
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}
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if (def.regClass().is_subdword() && !instr_can_access_subdword(instr)) {
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for (unsigned j = tmp.bytes(); j < 4; j++)
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if (reg.reg_b + j)
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err |= ra_fail(output, loc, assignments.at(regs[reg.reg_b + j]).defloc, "Assignment of element %d of %%%d overwrites the full register taken by %%%d from instruction", i, tmp.id(), regs[reg.reg_b + j]);
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}
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}
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for (const Definition& def : instr->definitions) {
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