radv/ac: start setting up the geom shader rings (v2)
This sets up the rings and adds the variables needed to make them work. v2: rework for sharing ring and scratch Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com>
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ca91db2402
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@ -72,6 +72,7 @@ struct nir_to_llvm_context {
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struct hash_table *phis;
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LLVMValueRef descriptor_sets[AC_UD_MAX_SETS];
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LLVMValueRef ring_offsets;
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LLVMValueRef push_constants;
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LLVMValueRef num_work_groups;
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LLVMValueRef workgroup_ids;
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@ -93,6 +94,9 @@ struct nir_to_llvm_context {
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LLVMValueRef gs_vtx_offset[6];
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LLVMValueRef gs_prim_id, gs_invocation_id;
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LLVMValueRef esgs_ring;
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LLVMValueRef gsvs_ring;
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LLVMValueRef prim_mask;
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LLVMValueRef sample_positions;
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LLVMValueRef persp_sample, persp_center, persp_centroid;
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@ -146,6 +150,10 @@ struct nir_to_llvm_context {
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unsigned num_culls;
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bool has_ds_bpermute;
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bool is_gs_copy_shader;
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LLVMValueRef gs_next_vertex;
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unsigned gs_max_out_vertices;
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};
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struct ac_tex_info {
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@ -400,6 +408,13 @@ static void create_function(struct nir_to_llvm_context *ctx)
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unsigned num_sets = ctx->options->layout ? ctx->options->layout->num_sets : 0;
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unsigned user_sgpr_idx;
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bool need_push_constants;
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bool need_ring_offsets = false;
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/* until we sort out scratch/global buffers always assign ring offsets for gs/vs/es */
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if (ctx->stage == MESA_SHADER_GEOMETRY ||
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ctx->stage == MESA_SHADER_VERTEX ||
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ctx->is_gs_copy_shader)
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need_ring_offsets = true;
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need_push_constants = true;
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if (!ctx->options->layout)
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@ -408,6 +423,10 @@ static void create_function(struct nir_to_llvm_context *ctx)
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!ctx->options->layout->dynamic_offset_count)
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need_push_constants = false;
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if (need_ring_offsets && !ctx->options->supports_spill) {
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arg_types[arg_idx++] = const_array(ctx->v16i8, 8); /* address of rings */
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}
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/* 1 for each descriptor set */
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for (unsigned i = 0; i < num_sets; ++i) {
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if (ctx->options->layout->set[i].layout->shader_stages & (1 << ctx->stage)) {
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@ -507,9 +526,17 @@ static void create_function(struct nir_to_llvm_context *ctx)
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arg_idx = 0;
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user_sgpr_idx = 0;
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if (ctx->options->supports_spill) {
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set_userdata_location_shader(ctx, AC_UD_SCRATCH, user_sgpr_idx, 2);
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if (ctx->options->supports_spill || need_ring_offsets) {
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set_userdata_location_shader(ctx, AC_UD_SCRATCH_RING_OFFSETS, user_sgpr_idx, 2);
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user_sgpr_idx += 2;
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if (ctx->options->supports_spill) {
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ctx->ring_offsets = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.implicit.buffer.ptr",
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LLVMPointerType(ctx->i8, CONST_ADDR_SPACE),
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NULL, 0, AC_FUNC_ATTR_READNONE);
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ctx->ring_offsets = LLVMBuildBitCast(ctx->builder, ctx->ring_offsets,
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const_array(ctx->v16i8, 8), "");
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} else
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ctx->ring_offsets = LLVMGetParam(ctx->main_function, arg_idx++);
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}
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for (unsigned i = 0; i < num_sets; ++i) {
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@ -4473,6 +4500,32 @@ static void ac_llvm_finalize_module(struct nir_to_llvm_context * ctx)
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LLVMDisposePassManager(passmgr);
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}
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static void
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ac_setup_rings(struct nir_to_llvm_context *ctx)
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{
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if (ctx->stage == MESA_SHADER_VERTEX && ctx->options->key.vs.as_es) {
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ctx->esgs_ring = build_indexed_load_const(ctx, ctx->ring_offsets, ctx->i32one);
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}
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if (ctx->is_gs_copy_shader) {
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ctx->gsvs_ring = build_indexed_load_const(ctx, ctx->ring_offsets, LLVMConstInt(ctx->i32, 3, false));
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}
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if (ctx->stage == MESA_SHADER_GEOMETRY) {
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LLVMValueRef tmp;
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ctx->esgs_ring = build_indexed_load_const(ctx, ctx->ring_offsets, LLVMConstInt(ctx->i32, 2, false));
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ctx->gsvs_ring = build_indexed_load_const(ctx, ctx->ring_offsets, LLVMConstInt(ctx->i32, 4, false));
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ctx->gsvs_ring = LLVMBuildBitCast(ctx->builder, ctx->gsvs_ring, ctx->v4i32, "");
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ctx->gsvs_ring = LLVMBuildInsertElement(ctx->builder, ctx->gsvs_ring, ctx->gsvs_num_entries, LLVMConstInt(ctx->i32, 2, false), "");
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tmp = LLVMBuildExtractElement(ctx->builder, ctx->gsvs_ring, ctx->i32one, "");
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tmp = LLVMBuildOr(ctx->builder, tmp, ctx->gsvs_ring_stride, "");
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ctx->gsvs_ring = LLVMBuildInsertElement(ctx->builder, ctx->gsvs_ring, tmp, ctx->i32one, "");
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ctx->gsvs_ring = LLVMBuildBitCast(ctx->builder, ctx->gsvs_ring, ctx->v16i8, "");
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}
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}
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static
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LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
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struct nir_shader *nir,
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@ -4530,8 +4583,14 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
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LLVMSetAlignment(var, 4);
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ctx.shared_memory = LLVMBuildBitCast(ctx.builder, var, i8p, "");
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}
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} else if (nir->stage == MESA_SHADER_GEOMETRY) {
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ctx.gs_next_vertex = ac_build_alloca(&ctx, ctx.i32, "gs_next_vertex");
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ctx.gs_max_out_vertices = nir->info->gs.vertices_out;
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}
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ac_setup_rings(&ctx);
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nir_foreach_variable(variable, &nir->inputs)
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handle_shader_input_decl(&ctx, variable);
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@ -36,6 +36,7 @@ struct radv_pipeline_layout;
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struct ac_vs_variant_key {
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uint32_t instance_rate_inputs;
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uint32_t as_es:1;
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};
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struct ac_fs_variant_key {
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@ -65,7 +66,7 @@ struct ac_userdata_info {
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};
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enum ac_ud_index {
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AC_UD_SCRATCH = 0,
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AC_UD_SCRATCH_RING_OFFSETS = 0,
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AC_UD_PUSH_CONSTANTS = 1,
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AC_UD_SHADER_START = 2,
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AC_UD_VS_VERTEX_BUFFERS = AC_UD_SHADER_START,
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