i965/fs: Patch the instruction generating discards; don't use CMP.Z.
CMP.Z doesn't work on Gen4-5 because the boolean isn't guaranteed to be 0 or 0xFFFFFFFF - only the low bit is defined. We can call emit_bool_to_cond_code to generate the condition in f0.0; the last instruction will generate the flag value. We can patch it to use f0.1, and negate the condition. Fixes discard tests on Gen4-5. Haswell shader-db stats: total instructions in shared programs: 5770279 -> 5769112 (-0.02%) instructions in affected programs: 64342 -> 63175 (-1.81%) helped: 1069 Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Matt Turner <mattst88@gmail.com>
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@ -2422,8 +2422,9 @@ fs_visitor::visit(ir_discard *ir)
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*/
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*/
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fs_inst *cmp;
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fs_inst *cmp;
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if (ir->condition) {
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if (ir->condition) {
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ir->condition->accept(this);
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emit_bool_to_cond_code(ir->condition);
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cmp = emit(CMP(reg_null_f, this->result, fs_reg(0), BRW_CONDITIONAL_Z));
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cmp = (fs_inst *) this->instructions.get_tail();
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cmp->conditional_mod = brw_negate_cmod(cmp->conditional_mod);
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} else {
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} else {
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fs_reg some_reg = fs_reg(retype(brw_vec8_grf(0, 0),
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fs_reg some_reg = fs_reg(retype(brw_vec8_grf(0, 0),
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BRW_REGISTER_TYPE_UW));
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BRW_REGISTER_TYPE_UW));
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