r600g: don't set up and don't call the fetch shader if there are no VS inputs
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@ -2298,6 +2298,9 @@ static void evergreen_emit_vertex_fetch_shader(struct r600_context *rctx, struct
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struct r600_cso_state *state = (struct r600_cso_state*)a;
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struct r600_cso_state *state = (struct r600_cso_state*)a;
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struct r600_fetch_shader *shader = (struct r600_fetch_shader*)state->cso;
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struct r600_fetch_shader *shader = (struct r600_fetch_shader*)state->cso;
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if (!shader)
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return;
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radeon_set_context_reg(cs, R_0288A4_SQ_PGM_START_FS,
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radeon_set_context_reg(cs, R_0288A4_SQ_PGM_START_FS,
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(shader->buffer->gpu_address + shader->offset) >> 8);
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(shader->buffer->gpu_address + shader->offset) >> 8);
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radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
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radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
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@ -3031,7 +3031,7 @@ static int r600_shader_from_tgsi(struct r600_context *rctx,
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ctx.file_offset[i] = 0;
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ctx.file_offset[i] = 0;
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}
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}
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if (ctx.type == PIPE_SHADER_VERTEX) {
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if (ctx.type == PIPE_SHADER_VERTEX && ctx.info.num_inputs) {
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ctx.file_offset[TGSI_FILE_INPUT] = 1;
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ctx.file_offset[TGSI_FILE_INPUT] = 1;
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r600_bytecode_add_cfinst(ctx.bc, CF_OP_CALL_FS);
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r600_bytecode_add_cfinst(ctx.bc, CF_OP_CALL_FS);
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}
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}
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@ -1898,6 +1898,9 @@ static void r600_emit_vertex_fetch_shader(struct r600_context *rctx, struct r600
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struct r600_cso_state *state = (struct r600_cso_state*)a;
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struct r600_cso_state *state = (struct r600_cso_state*)a;
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struct r600_fetch_shader *shader = (struct r600_fetch_shader*)state->cso;
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struct r600_fetch_shader *shader = (struct r600_fetch_shader*)state->cso;
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if (!shader)
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return;
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radeon_set_context_reg(cs, R_028894_SQ_PGM_START_FS, shader->offset >> 8);
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radeon_set_context_reg(cs, R_028894_SQ_PGM_START_FS, shader->offset >> 8);
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radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
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radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
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radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, shader->buffer,
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radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, shader->buffer,
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