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i965: Move binding table setup to codegen time. 

Setting up binding tables really has little to do with the actual process
of turning shaders into instructions; it's more part of setting up
prog_data.  This commit moves it out of the visitors and with the rest of
the prog_data setup stuff.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Jason Ekstrand 2015-10-01 08:55:20 -07:00
parent 28709e37d9
commit ea006c4cb5
10 changed files with 67 additions and 66 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
src/mesa/drivers/dri/i965/brw_cs.c
View File

@ -32,6 +32,23 @@
#include "intel_batchbuffer.h"
#include "glsl/nir/nir.h"
static void
assign_cs_binding_table_offsets(const struct brw_device_info *devinfo,
const struct gl_shader_program *shader_prog,
const struct gl_program *prog,
struct brw_cs_prog_data *prog_data)
{
uint32_t next_binding_table_offset = 0;
/* May not be used if the gl_NumWorkGroups variable is not accessed. */
prog_data->binding_table.work_groups_start = next_binding_table_offset;
next_binding_table_offset++;
brw_assign_common_binding_table_offsets(MESA_SHADER_COMPUTE, devinfo,
shader_prog, prog, &prog_data->base,
next_binding_table_offset);
}
static bool
brw_codegen_cs_prog(struct brw_context *brw,
struct gl_shader_program *prog,
@ -52,6 +69,9 @@ brw_codegen_cs_prog(struct brw_context *brw,
memset(&prog_data, 0, sizeof(prog_data));
assign_cs_binding_table_offsets(brw->intelScreen->devinfo, prog,
&cp->program.Base, &prog_data);
/* Allocate the references to the uniforms that will end up in the
* prog_data associated with the compiled program, and which will be freed
* by the state cache.

42
src/mesa/drivers/dri/i965/brw_fs.cpp
View File

@ -4735,41 +4735,6 @@ fs_visitor::setup_cs_payload()
}
}
void
fs_visitor::assign_fs_binding_table_offsets()
{
assert(stage == MESA_SHADER_FRAGMENT);
brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data;
brw_wm_prog_key *key = (brw_wm_prog_key*) this->key;
uint32_t next_binding_table_offset = 0;
/* If there are no color regions, we still perform an FB write to a null
* renderbuffer, which we place at surface index 0.
*/
prog_data->binding_table.render_target_start = next_binding_table_offset;
next_binding_table_offset += MAX2(key->nr_color_regions, 1);
brw_assign_common_binding_table_offsets(MESA_SHADER_FRAGMENT, devinfo,
shader_prog, prog, stage_prog_data,
next_binding_table_offset);
}
void
fs_visitor::assign_cs_binding_table_offsets()
{
assert(stage == MESA_SHADER_COMPUTE);
brw_cs_prog_data *prog_data = (brw_cs_prog_data*) this->prog_data;
uint32_t next_binding_table_offset = 0;
/* May not be used if the gl_NumWorkGroups variable is not accessed. */
prog_data->binding_table.work_groups_start = next_binding_table_offset;
next_binding_table_offset++;
brw_assign_common_binding_table_offsets(MESA_SHADER_COMPUTE, devinfo,
shader_prog, prog, stage_prog_data,
next_binding_table_offset);
}
void
fs_visitor::calculate_register_pressure()
{
@ -4983,9 +4948,6 @@ fs_visitor::run_vs(gl_clip_plane *clip_planes)
{
assert(stage == MESA_SHADER_VERTEX);
brw_assign_common_binding_table_offsets(MESA_SHADER_VERTEX, devinfo,
shader_prog, prog, stage_prog_data,
0);
setup_vs_payload();
if (shader_time_index >= 0)
@ -5026,8 +4988,6 @@ fs_visitor::run_fs(bool do_rep_send)
sanity_param_count = prog->Parameters->NumParameters;
assign_fs_binding_table_offsets();
if (devinfo->gen >= 6)
setup_payload_gen6();
else
@ -5114,8 +5074,6 @@ fs_visitor::run_cs()
sanity_param_count = prog->Parameters->NumParameters;
assign_cs_binding_table_offsets();
setup_cs_payload();
if (shader_time_index >= 0)

2
src/mesa/drivers/dri/i965/brw_fs.h
View File

@ -128,8 +128,6 @@ public:
bool run_cs();
void optimize();
void allocate_registers();
void assign_fs_binding_table_offsets();
void assign_cs_binding_table_offsets();
void setup_payload_gen4();
void setup_payload_gen6();
void setup_vs_payload();

19
src/mesa/drivers/dri/i965/brw_gs.c
View File

@ -34,6 +34,22 @@
#include "brw_ff_gs.h"
#include "glsl/nir/nir.h"
static void
assign_gs_binding_table_offsets(const struct brw_device_info *devinfo,
const struct gl_shader_program *shader_prog,
const struct gl_program *prog,
struct brw_gs_prog_data *prog_data)
{
/* In gen6 we reserve the first BRW_MAX_SOL_BINDINGS entries for transform
* feedback surfaces.
*/
uint32_t reserved = devinfo->gen == 6 ? BRW_MAX_SOL_BINDINGS : 0;
brw_assign_common_binding_table_offsets(MESA_SHADER_GEOMETRY, devinfo,
shader_prog, prog,
&prog_data->base.base,
reserved);
}
bool
brw_codegen_gs_prog(struct brw_context *brw,
@ -52,6 +68,9 @@ brw_codegen_gs_prog(struct brw_context *brw,
c.prog_data.invocations = gp->program.Invocations;
assign_gs_binding_table_offsets(brw->intelScreen->devinfo, prog,
&gp->program.Base, &c.prog_data);
/* Allocate the references to the uniforms that will end up in the
* prog_data associated with the compiled program, and which will be freed
* by the state cache.

9
src/mesa/drivers/dri/i965/brw_vec4.cpp
View File

@ -1707,13 +1707,6 @@ vec4_vs_visitor::setup_payload(void)
this->first_non_payload_grf = reg;
}
void
vec4_visitor::assign_binding_table_offsets()
{
brw_assign_common_binding_table_offsets(stage, devinfo, shader_prog, prog,
stage_prog_data, 0);
}
src_reg
vec4_visitor::get_timestamp()
{
@ -1814,8 +1807,6 @@ vec4_visitor::run()
if (shader_time_index >= 0)
emit_shader_time_begin();
assign_binding_table_offsets();
emit_prolog();
assert(prog->nir != NULL);

1
src/mesa/drivers/dri/i965/brw_vec4.h
View File

@ -374,7 +374,6 @@ protected:
bool interleaved);
void setup_payload_interference(struct ra_graph *g, int first_payload_node,
int reg_node_count);
virtual void assign_binding_table_offsets();
virtual void setup_payload() = 0;
virtual void emit_prolog() = 0;
virtual void emit_thread_end() = 0;

5
src/mesa/drivers/dri/i965/brw_vs.c
View File

@ -105,6 +105,11 @@ brw_codegen_vs_prog(struct brw_context *brw,
mem_ctx = ralloc_context(NULL);
brw_assign_common_binding_table_offsets(MESA_SHADER_VERTEX,
brw->intelScreen->devinfo,
prog, &vp->program.Base,
&prog_data.base.base, 0);
/* Allocate the references to the uniforms that will end up in the
* prog_data associated with the compiled program, and which will be freed
* by the state cache.

23
src/mesa/drivers/dri/i965/brw_wm.c
View File

@ -132,6 +132,26 @@ computed_depth_mode(struct gl_fragment_program *fp)
return BRW_PSCDEPTH_OFF;
}
static void
assign_fs_binding_table_offsets(const struct brw_device_info *devinfo,
const struct gl_shader_program *shader_prog,
const struct gl_program *prog,
const struct brw_wm_prog_key *key,
struct brw_wm_prog_data *prog_data)
{
uint32_t next_binding_table_offset = 0;
/* If there are no color regions, we still perform an FB write to a null
* renderbuffer, which we place at surface index 0.
*/
prog_data->binding_table.render_target_start = next_binding_table_offset;
next_binding_table_offset += MAX2(key->nr_color_regions, 1);
brw_assign_common_binding_table_offsets(MESA_SHADER_FRAGMENT, devinfo,
shader_prog, prog, &prog_data->base,
next_binding_table_offset);
}
/**
* All Mesa program -> GPU code generation goes through this function.
* Depending on the instructions used (i.e. flow control instructions)
@ -170,6 +190,9 @@ brw_codegen_wm_prog(struct brw_context *brw,
if (!prog)
prog_data.base.use_alt_mode = true;
assign_fs_binding_table_offsets(brw->intelScreen->devinfo, prog,
&fp->program.Base, key, &prog_data);
/* Allocate the references to the uniforms that will end up in the
* prog_data associated with the compiled program, and which will be freed
* by the state cache.

11
src/mesa/drivers/dri/i965/gen6_gs_visitor.cpp
View File

@ -35,17 +35,6 @@ const unsigned MAX_GS_INPUT_VERTICES = 6;
namespace brw {
void
gen6_gs_visitor::assign_binding_table_offsets()
{
/* In gen6 we reserve the first BRW_MAX_SOL_BINDINGS entries for transform
* feedback surfaces.
*/
brw_assign_common_binding_table_offsets(MESA_SHADER_GEOMETRY, devinfo,
shader_prog, prog, stage_prog_data,
BRW_MAX_SOL_BINDINGS);
}
void
gen6_gs_visitor::emit_prolog()
{

1
src/mesa/drivers/dri/i965/gen6_gs_visitor.h
View File

@ -46,7 +46,6 @@ public:
shader_time_index) {}
protected:
virtual void assign_binding_table_offsets();
virtual void emit_prolog();
virtual void emit_thread_end();
virtual void gs_emit_vertex(int stream_id);