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i965: Set ExecSize to 16 for loop instructions in SIMD16 shaders. 

Previously, we explicitly set the execution size to BRW_EXECUTE_8 and
disabled compression for loop instructions.  I can't imagine how this
could be correct in SIMD16 mode.

Looking at the history, it appears that this code has used BRW_EXECUTE_8
since 2007, when we had a SIMD8 backend that supported control flow and
a separate SIMD16 backend that didn't.  Presumably, when we added SIMD16
support for shaders with control flow, we simply neglected to update it.

Note that Gen4-5 don't support SIMD16 on shaders with control flow.

This might be a candidate for stable, but would need to be rewritten
completely due to the brw_inst API changes in master.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Kenneth Graunke 2014-08-04 00:06:05 -07:00
parent e64dbd050d
commit e9a9d441f0
1 changed files with 8 additions and 5 deletions
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13
src/mesa/drivers/dri/i965/brw_eu_emit.c
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@ -1526,7 +1526,8 @@ brw_BREAK(struct brw_compile *p)
p->if_depth_in_loop[p->loop_stack_depth]);
}
brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
brw_inst_set_exec_size(brw, insn, BRW_EXECUTE_8);
brw_inst_set_exec_size(brw, insn, p->compressed ? BRW_EXECUTE_16
: BRW_EXECUTE_8);
return insn;
}
@ -1546,9 +1547,9 @@ brw_CONT(struct brw_compile *p)
brw_inst_set_gen4_pop_count(brw, insn,
p->if_depth_in_loop[p->loop_stack_depth]);
}
brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
brw_inst_set_exec_size(brw, insn, BRW_EXECUTE_8);
brw_inst_set_exec_size(brw, insn, p->compressed ? BRW_EXECUTE_16
: BRW_EXECUTE_8);
return insn;
}
@ -1664,7 +1665,8 @@ brw_WHILE(struct brw_compile *p)
brw_set_src1(p, insn, brw_imm_ud(0));
brw_inst_set_jip(brw, insn, br * (do_insn - insn));
brw_inst_set_exec_size(brw, insn, BRW_EXECUTE_8);
brw_inst_set_exec_size(brw, insn, p->compressed ? BRW_EXECUTE_16
: BRW_EXECUTE_8);
} else if (brw->gen == 6) {
insn = next_insn(p, BRW_OPCODE_WHILE);
do_insn = get_inner_do_insn(p);
@ -1674,7 +1676,8 @@ brw_WHILE(struct brw_compile *p)
brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
brw_inst_set_exec_size(brw, insn, BRW_EXECUTE_8);
brw_inst_set_exec_size(brw, insn, p->compressed ? BRW_EXECUTE_16
: BRW_EXECUTE_8);
} else {
if (p->single_program_flow) {
insn = next_insn(p, BRW_OPCODE_ADD);