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radeonsi: use si_get_indirect_index for CONST indexing 

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2017-09-26 15:30:34 +02:00
parent 212c612a63
commit e986a16c16
3 changed files with 14 additions and 14 deletions
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24
src/gallium/drivers/radeonsi/si_shader.c
View File

@ -706,6 +706,7 @@ static LLVMValueRef get_primitive_id(struct si_shader_context *ctx,
*/ */
LLVMValueRef si_get_indirect_index(struct si_shader_context *ctx, LLVMValueRef si_get_indirect_index(struct si_shader_context *ctx,
const struct tgsi_ind_register *ind, const struct tgsi_ind_register *ind,
unsigned addr_mul,
int rel_index) int rel_index)
{ {
struct gallivm_state *gallivm = &ctx->gallivm; struct gallivm_state *gallivm = &ctx->gallivm;
@ -713,6 +714,10 @@ LLVMValueRef si_get_indirect_index(struct si_shader_context *ctx,
result = ctx->addrs[ind->Index][ind->Swizzle]; result = ctx->addrs[ind->Index][ind->Swizzle];
result = LLVMBuildLoad(gallivm->builder, result, ""); result = LLVMBuildLoad(gallivm->builder, result, "");
if (addr_mul != 1)
result = LLVMBuildMul(gallivm->builder, result,
LLVMConstInt(ctx->i32, addr_mul, 0), "");
result = LLVMBuildAdd(gallivm->builder, result, result = LLVMBuildAdd(gallivm->builder, result,
LLVMConstInt(ctx->i32, rel_index, 0), ""); LLVMConstInt(ctx->i32, rel_index, 0), "");
return result; return result;
@ -726,7 +731,7 @@ LLVMValueRef si_get_bounded_indirect_index(struct si_shader_context *ctx,
const struct tgsi_ind_register *ind, const struct tgsi_ind_register *ind,
int rel_index, unsigned num) int rel_index, unsigned num)
{ {
LLVMValueRef result = si_get_indirect_index(ctx, ind, rel_index); LLVMValueRef result = si_get_indirect_index(ctx, ind, 1, rel_index);
return si_llvm_bound_index(ctx, result, num); return si_llvm_bound_index(ctx, result, num);
} }
@ -767,7 +772,7 @@ static LLVMValueRef get_dw_address(struct si_shader_context *ctx,
if (reg.Dimension.Indirect) if (reg.Dimension.Indirect)
index = si_get_indirect_index(ctx, &reg.DimIndirect, index = si_get_indirect_index(ctx, &reg.DimIndirect,
reg.Dimension.Index); 1, reg.Dimension.Index);
else else
index = LLVMConstInt(ctx->i32, reg.Dimension.Index, 0); index = LLVMConstInt(ctx->i32, reg.Dimension.Index, 0);
@ -800,7 +805,7 @@ static LLVMValueRef get_dw_address(struct si_shader_context *ctx,
first = reg.Register.Index; first = reg.Register.Index;
ind_index = si_get_indirect_index(ctx, &reg.Indirect, ind_index = si_get_indirect_index(ctx, &reg.Indirect,
reg.Register.Index - first); 1, reg.Register.Index - first);
base_addr = LLVMBuildAdd(gallivm->builder, base_addr, base_addr = LLVMBuildAdd(gallivm->builder, base_addr,
LLVMBuildMul(gallivm->builder, ind_index, LLVMBuildMul(gallivm->builder, ind_index,
@ -903,7 +908,7 @@ static LLVMValueRef get_tcs_tes_buffer_address_from_reg(
if (reg.Dimension.Indirect) if (reg.Dimension.Indirect)
vertex_index = si_get_indirect_index(ctx, &reg.DimIndirect, vertex_index = si_get_indirect_index(ctx, &reg.DimIndirect,
reg.Dimension.Index); 1, reg.Dimension.Index);
else else
vertex_index = LLVMConstInt(ctx->i32, reg.Dimension.Index, 0); vertex_index = LLVMConstInt(ctx->i32, reg.Dimension.Index, 0);
} }
@ -929,7 +934,7 @@ static LLVMValueRef get_tcs_tes_buffer_address_from_reg(
param_base = reg.Register.Index; param_base = reg.Register.Index;
param_index = si_get_indirect_index(ctx, &reg.Indirect, param_index = si_get_indirect_index(ctx, &reg.Indirect,
reg.Register.Index - param_base); 1, reg.Register.Index - param_base);
} else { } else {
param_base = reg.Register.Index; param_base = reg.Register.Index;
@ -1897,7 +1902,6 @@ static LLVMValueRef fetch_constant(
unsigned swizzle) unsigned swizzle)
{ {
struct si_shader_context *ctx = si_shader_context(bld_base); struct si_shader_context *ctx = si_shader_context(bld_base);
struct lp_build_context *base = &bld_base->base;
const struct tgsi_ind_register *ireg = &reg->Indirect; const struct tgsi_ind_register *ireg = &reg->Indirect;
unsigned buf, idx; unsigned buf, idx;
@ -1930,11 +1934,7 @@ static LLVMValueRef fetch_constant(
bufp = load_const_buffer_desc(ctx, buf); bufp = load_const_buffer_desc(ctx, buf);
if (reg->Register.Indirect) { if (reg->Register.Indirect) {
addr = ctx->addrs[ireg->Index][ireg->Swizzle]; addr = si_get_indirect_index(ctx, ireg, 16, idx * 4);
addr = LLVMBuildLoad(base->gallivm->builder, addr, "load addr reg");
addr = lp_build_mul_imm(&bld_base->uint_bld, addr, 16);
addr = lp_build_add(&bld_base->uint_bld, addr,
LLVMConstInt(ctx->i32, idx * 4, 0));
} else { } else {
addr = LLVMConstInt(ctx->i32, idx * 4, 0); addr = LLVMConstInt(ctx->i32, idx * 4, 0);
} }
@ -3773,7 +3773,7 @@ static void build_interp_intrinsic(const struct lp_build_tgsi_action *action,
} }
array_idx = si_get_indirect_index(ctx, &input->Indirect, array_idx = si_get_indirect_index(ctx, &input->Indirect,
input->Register.Index - input_base); 1, input->Register.Index - input_base);
} else { } else {
input_base = inst->Src[0].Register.Index; input_base = inst->Src[0].Register.Index;
input_array_size = 1; input_array_size = 1;

2
src/gallium/drivers/radeonsi/si_shader_internal.h
View File

@ -301,7 +301,7 @@ void si_emit_waitcnt(struct si_shader_context *ctx, unsigned simm16);
LLVMValueRef si_get_indirect_index(struct si_shader_context *ctx, LLVMValueRef si_get_indirect_index(struct si_shader_context *ctx,
const struct tgsi_ind_register *ind, const struct tgsi_ind_register *ind,
int rel_index); unsigned addr_mul, int rel_index);
LLVMValueRef si_get_bounded_indirect_index(struct si_shader_context *ctx, LLVMValueRef si_get_bounded_indirect_index(struct si_shader_context *ctx,
const struct tgsi_ind_register *ind, const struct tgsi_ind_register *ind,
int rel_index, unsigned num); int rel_index, unsigned num);

2
src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
View File

@ -82,7 +82,7 @@ shader_buffer_fetch_rsrc(struct si_shader_context *ctx,
index = LLVMConstInt(ctx->i32, reg->Register.Index, false); index = LLVMConstInt(ctx->i32, reg->Register.Index, false);
} else { } else {
index = si_get_indirect_index(ctx, &reg->Indirect, index = si_get_indirect_index(ctx, &reg->Indirect,
reg->Register.Index); 1, reg->Register.Index);
} }
if (ubo) if (ubo)