i965/miptree: Add a helper for getting the aux isl_surf from a miptree
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Chad Versace <chad.versace@intel.com>
This commit is contained in:
Jason Ekstrand
parent
1e45349e82
commit
e974456d4f
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@ -3168,6 +3168,123 @@ intel_miptree_get_isl_surf(struct brw_context *brw,
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surf->usage = 0; /* TODO */
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}
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/* WARNING: THE SURFACE CREATED BY THIS FUNCTION IS NOT COMPLETE AND CANNOT BE
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* USED FOR ANY REAL CALCULATIONS. THE ONLY VALID USE OF SUCH A SURFACE IS TO
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* PASS IT INTO isl_surf_fill_state.
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*/
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void
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intel_miptree_get_aux_isl_surf(struct brw_context *brw,
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const struct intel_mipmap_tree *mt,
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struct isl_surf *surf,
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enum isl_aux_usage *usage)
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{
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/* Much is the same as the regular surface */
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intel_miptree_get_isl_surf(brw, mt->mcs_mt, surf);
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/* Figure out the layout */
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if (_mesa_get_format_base_format(mt->format) == GL_DEPTH_COMPONENT) {
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*usage = ISL_AUX_USAGE_HIZ;
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} else if (mt->num_samples > 1) {
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assert(mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS);
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*usage = ISL_AUX_USAGE_MCS;
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} else if (intel_miptree_is_lossless_compressed(brw, mt)) {
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assert(brw->gen >= 9);
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*usage = ISL_AUX_USAGE_CCS_E;
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} else if (mt->fast_clear_state != INTEL_FAST_CLEAR_STATE_NO_MCS) {
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*usage = ISL_AUX_USAGE_CCS_D;
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} else {
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unreachable("Invalid MCS miptree");
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}
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/* Figure out the format and tiling of the auxiliary surface */
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switch (*usage) {
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case ISL_AUX_USAGE_NONE:
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unreachable("Invalid MCS miptree");
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case ISL_AUX_USAGE_HIZ:
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surf->format = ISL_FORMAT_HIZ;
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surf->tiling = ISL_TILING_HIZ;
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surf->usage = ISL_SURF_USAGE_HIZ_BIT;
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break;
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case ISL_AUX_USAGE_MCS:
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/*
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* From the SKL PRM:
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* "When Auxiliary Surface Mode is set to AUX_CCS_D or AUX_CCS_E,
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* HALIGN 16 must be used."
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*/
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if (brw->gen >= 9)
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assert(mt->halign == 16);
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surf->usage = ISL_SURF_USAGE_MCS_BIT;
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switch (mt->num_samples) {
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case 2: surf->format = ISL_FORMAT_MCS_2X; break;
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case 4: surf->format = ISL_FORMAT_MCS_4X; break;
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case 8: surf->format = ISL_FORMAT_MCS_8X; break;
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case 16: surf->format = ISL_FORMAT_MCS_16X; break;
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default:
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unreachable("Invalid number of samples");
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}
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break;
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case ISL_AUX_USAGE_CCS_D:
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case ISL_AUX_USAGE_CCS_E:
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/*
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* From the BDW PRM, Volume 2d, page 260 (RENDER_SURFACE_STATE):
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*
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* "When MCS is enabled for non-MSRT, HALIGN_16 must be used"
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*
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* From the hardware spec for GEN9:
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*
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* "When Auxiliary Surface Mode is set to AUX_CCS_D or AUX_CCS_E,
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* HALIGN 16 must be used."
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*/
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assert(mt->num_samples <= 1);
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if (brw->gen >= 8)
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assert(mt->halign == 16);
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surf->tiling = ISL_TILING_CCS;
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surf->usage = ISL_SURF_USAGE_CCS_BIT;
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if (brw->gen >= 9) {
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assert(mt->tiling == I915_TILING_Y);
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switch (_mesa_get_format_bytes(mt->format)) {
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case 4: surf->format = ISL_FORMAT_GEN9_CCS_32BPP; break;
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case 8: surf->format = ISL_FORMAT_GEN9_CCS_64BPP; break;
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case 16: surf->format = ISL_FORMAT_GEN9_CCS_128BPP; break;
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default:
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unreachable("Invalid format size for color compression");
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}
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} else if (mt->tiling == I915_TILING_Y) {
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switch (_mesa_get_format_bytes(mt->format)) {
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case 4: surf->format = ISL_FORMAT_GEN7_CCS_32BPP_Y; break;
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case 8: surf->format = ISL_FORMAT_GEN7_CCS_64BPP_Y; break;
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case 16: surf->format = ISL_FORMAT_GEN7_CCS_128BPP_Y; break;
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default:
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unreachable("Invalid format size for color compression");
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}
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} else {
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assert(mt->tiling == I915_TILING_X);
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switch (_mesa_get_format_bytes(mt->format)) {
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case 4: surf->format = ISL_FORMAT_GEN7_CCS_32BPP_X; break;
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case 8: surf->format = ISL_FORMAT_GEN7_CCS_64BPP_X; break;
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case 16: surf->format = ISL_FORMAT_GEN7_CCS_128BPP_X; break;
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default:
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unreachable("Invalid format size for color compression");
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}
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}
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break;
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}
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/* Auxiliary surfaces in ISL have compressed formats and array_pitch_el_rows
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* is in elements. This doesn't match intel_mipmap_tree::qpitch which is
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* in elements of the primary color surface so we have to divide by the
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* compression block height.
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*/
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surf->array_pitch_el_rows = mt->qpitch / isl_format_get_layout(surf->format)->bh;
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}
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union isl_color_value
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intel_miptree_get_isl_clear_color(struct brw_context *brw,
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const struct intel_mipmap_tree *mt)
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@ -801,6 +801,11 @@ void
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intel_miptree_get_isl_surf(struct brw_context *brw,
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const struct intel_mipmap_tree *mt,
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struct isl_surf *surf);
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void
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intel_miptree_get_aux_isl_surf(struct brw_context *brw,
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const struct intel_mipmap_tree *mt,
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struct isl_surf *surf,
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enum isl_aux_usage *usage);
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union isl_color_value
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intel_miptree_get_isl_clear_color(struct brw_context *brw,
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