panfrost: Add an helper to update the rasterizer part of a tiler job desc
That's part of our attempt to make panfrost_emit_for_draw() a bit more dry and eventually get rid of it by inlining the code in panfrost_draw_vbo(). This is just one step in this direction. Note that we get rid of the panfrost_rasterizer.tiler_gl_enables field along the way, as setting/clearing those bits at draw time instead of doing when the state is created should make a huge difference. We might get back to pre-computed VT descs at some point, but let's keep things simple for now. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4083>
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@ -59,6 +59,35 @@ panfrost_vt_attach_framebuffer(struct panfrost_context *ctx,
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vt->postfix.shared_memory = batch->framebuffer.gpu;
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}
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void
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panfrost_vt_update_rasterizer(struct panfrost_context *ctx,
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struct midgard_payload_vertex_tiler *tp)
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{
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struct panfrost_rasterizer *rasterizer = ctx->rasterizer;
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tp->gl_enables |= 0x7;
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SET_BIT(tp->gl_enables, MALI_FRONT_CCW_TOP,
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rasterizer && rasterizer->base.front_ccw);
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SET_BIT(tp->gl_enables, MALI_CULL_FACE_FRONT,
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rasterizer && (rasterizer->base.cull_face & PIPE_FACE_FRONT));
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SET_BIT(tp->gl_enables, MALI_CULL_FACE_BACK,
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rasterizer && (rasterizer->base.cull_face & PIPE_FACE_BACK));
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SET_BIT(tp->prefix.unknown_draw, MALI_DRAW_FLATSHADE_FIRST,
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rasterizer && rasterizer->base.flatshade_first);
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if (!panfrost_writes_point_size(ctx)) {
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bool points = tp->prefix.draw_mode == MALI_POINTS;
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float val = 0.0f;
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if (rasterizer)
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val = points ?
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rasterizer->base.point_size :
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rasterizer->base.line_width;
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tp->primitive_size.constant = val;
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}
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}
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void
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panfrost_vt_update_occlusion_query(struct panfrost_context *ctx,
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struct midgard_payload_vertex_tiler *tp)
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@ -36,6 +36,10 @@ void
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panfrost_vt_attach_framebuffer(struct panfrost_context *ctx,
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struct midgard_payload_vertex_tiler *vt);
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void
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panfrost_vt_update_rasterizer(struct panfrost_context *ctx,
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struct midgard_payload_vertex_tiler *tp);
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void
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panfrost_vt_update_occlusion_query(struct panfrost_context *ctx,
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struct midgard_payload_vertex_tiler *tp);
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@ -544,7 +544,6 @@ panfrost_emit_for_draw(struct panfrost_context *ctx)
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if (ctx->rasterizer) {
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bool msaa = ctx->rasterizer->base.multisample;
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ctx->payloads[PIPE_SHADER_FRAGMENT].gl_enables = ctx->rasterizer->tiler_gl_enables;
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/* TODO: Sample size */
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SET_BIT(ctx->fragment_shader_core.unknown2_3, MALI_HAS_MSAA, msaa);
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@ -553,27 +552,13 @@ panfrost_emit_for_draw(struct panfrost_context *ctx)
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panfrost_batch_set_requirements(batch);
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panfrost_vt_update_rasterizer(ctx, &ctx->payloads[PIPE_SHADER_FRAGMENT]);
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panfrost_vt_update_occlusion_query(ctx, &ctx->payloads[PIPE_SHADER_FRAGMENT]);
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panfrost_patch_shader_state(ctx, PIPE_SHADER_VERTEX);
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panfrost_emit_shader_meta(batch, PIPE_SHADER_VERTEX,
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&ctx->payloads[PIPE_SHADER_VERTEX]);
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if (ctx->shader[PIPE_SHADER_VERTEX] && ctx->shader[PIPE_SHADER_FRAGMENT]) {
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/* Check if we need to link the gl_PointSize varying */
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if (!panfrost_writes_point_size(ctx)) {
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/* If the size is constant, write it out. Otherwise,
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* don't touch primitive_size (since we would clobber
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* the pointer there) */
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bool points = ctx->payloads[PIPE_SHADER_FRAGMENT].prefix.draw_mode == MALI_POINTS;
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ctx->payloads[PIPE_SHADER_FRAGMENT].primitive_size.constant = points ?
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ctx->rasterizer->base.point_size :
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ctx->rasterizer->base.line_width;
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}
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}
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if (ctx->shader[PIPE_SHADER_FRAGMENT]) {
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struct panfrost_shader_state *variant = panfrost_get_shader_state(ctx, PIPE_SHADER_FRAGMENT);
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@ -1110,18 +1095,6 @@ panfrost_create_rasterizer_state(
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so->base = *cso;
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/* Bitmask, unknown meaning of the start value. 0x105 on 32-bit T6XX */
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so->tiler_gl_enables = 0x7;
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if (cso->front_ccw)
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so->tiler_gl_enables |= MALI_FRONT_CCW_TOP;
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if (cso->cull_face & PIPE_FACE_FRONT)
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so->tiler_gl_enables |= MALI_CULL_FACE_FRONT;
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if (cso->cull_face & PIPE_FACE_BACK)
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so->tiler_gl_enables |= MALI_CULL_FACE_BACK;
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return so;
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}
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@ -178,9 +178,6 @@ struct panfrost_context {
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struct panfrost_rasterizer {
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struct pipe_rasterizer_state base;
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/* Bitmask of front face, etc */
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unsigned tiler_gl_enables;
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};
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/* Variants bundle together to form the backing CSO, bundling multiple
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