pan/bi: Use new instruction types
And remove now redundant casts Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
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@ -36,12 +36,11 @@ bi_opt_dead_code_eliminate(bi_context *ctx, bi_block *block)
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uint16_t *live = mem_dup(block->base.live_out, temp_count * sizeof(uint16_t));
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bi_foreach_instr_in_block_safe_rev(block, _ins) {
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bi_instr *ins = (bi_instr *) _ins;
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bi_foreach_instr_in_block_safe_rev(block, ins) {
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unsigned index = bi_get_node(ins->dest[0]);
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if (index < temp_count && !live[index]) {
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bi_remove_instruction((bi_instruction *) ins);
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bi_remove_instruction(ins);
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progress |= true;
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}
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@ -173,9 +173,9 @@ bi_assign_fau_idx(bi_clause *clause,
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bi_bundle *bundle)
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{
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bool assigned =
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bi_assign_fau_idx_single(&bundle->regs, clause, (bi_instr *) bundle->fma, false, true);
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bi_assign_fau_idx_single(&bundle->regs, clause, bundle->fma, false, true);
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bi_assign_fau_idx_single(&bundle->regs, clause, (bi_instr *) bundle->add, assigned, false);
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bi_assign_fau_idx_single(&bundle->regs, clause, bundle->add, assigned, false);
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}
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/* Assigns a slot for reading, before anything is written */
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@ -224,21 +224,21 @@ bi_assign_slots(bi_bundle *now, bi_bundle *prev)
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* and thus gets skipped over here. */
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bool read_dreg = now->add &&
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bi_opcode_props[((bi_instr *) now->add)->op].sr_read;
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bi_opcode_props[(now->add)->op].sr_read;
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bool write_dreg = now->add &&
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bi_opcode_props[((bi_instr *) now->add)->op].sr_write;
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bi_opcode_props[(now->add)->op].sr_write;
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/* First, assign reads */
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if (now->fma)
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bi_foreach_src(now->fma, src)
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bi_assign_slot_read(&now->regs, ((bi_instr *) now->fma)->src[src]);
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bi_assign_slot_read(&now->regs, (now->fma)->src[src]);
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if (now->add) {
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bi_foreach_src(now->add, src) {
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if (!(src == 0 && read_dreg))
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bi_assign_slot_read(&now->regs, ((bi_instr *) now->add)->src[src]);
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bi_assign_slot_read(&now->regs, (now->add)->src[src]);
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}
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}
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@ -246,8 +246,8 @@ bi_assign_slots(bi_bundle *now, bi_bundle *prev)
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* +ATEST wants its destination written to both a staging register
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* _and_ a regular write, because it may not generate a message */
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if (prev->add && (!write_dreg || ((bi_instr *) prev->add)->op == BI_OPCODE_ATEST)) {
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bi_index idx = ((bi_instr *) prev->add)->dest[0];
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if (prev->add && (!write_dreg || prev->add->op == BI_OPCODE_ATEST)) {
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bi_index idx = prev->add->dest[0];
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if (idx.type == BI_INDEX_REGISTER) {
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now->regs.slot[3] = idx.value;
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@ -256,7 +256,7 @@ bi_assign_slots(bi_bundle *now, bi_bundle *prev)
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}
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if (prev->fma) {
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bi_index idx = ((bi_instr *) prev->fma)->dest[0];
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bi_index idx = (prev->fma)->dest[0];
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if (idx.type == BI_INDEX_REGISTER) {
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if (now->regs.slot23.slot3) {
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@ -405,7 +405,7 @@ bi_flip_slots(bi_registers *regs)
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static void
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bi_lower_cubeface2(bi_context *ctx, bi_bundle *bundle)
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{
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bi_instr *old = (bi_instr *) bundle->add;
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bi_instr *old = bundle->add;
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/* Filter for +CUBEFACE2 */
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if (!old || old->op != BI_OPCODE_CUBEFACE2)
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@ -425,7 +425,7 @@ bi_lower_cubeface2(bi_context *ctx, bi_bundle *bundle)
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/* Emit the instruction */
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list_addtail(&new->link, &old->link);
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bundle->fma = (bi_instruction *) new;
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bundle->fma = new;
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/* Now replace the sources of the CUBEFACE2 with a single passthrough
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* from the CUBEFACE1 (and a side-channel) */
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@ -476,23 +476,23 @@ bi_pack_bundle(bi_clause *clause, bi_bundle bundle, bi_bundle prev, bool first_b
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bi_flip_slots(&bundle.regs);
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bool sr_read = bundle.add &&
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bi_opcode_props[((bi_instr *) bundle.add)->op].sr_read;
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bi_opcode_props[(bundle.add)->op].sr_read;
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uint64_t reg = bi_pack_registers(bundle.regs);
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uint64_t fma = bi_pack_fma((bi_instr *) bundle.fma,
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bi_get_src_new((bi_instr *) bundle.fma, &bundle.regs, 0),
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bi_get_src_new((bi_instr *) bundle.fma, &bundle.regs, 1),
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bi_get_src_new((bi_instr *) bundle.fma, &bundle.regs, 2),
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bi_get_src_new((bi_instr *) bundle.fma, &bundle.regs, 3));
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uint64_t fma = bi_pack_fma(bundle.fma,
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bi_get_src_new(bundle.fma, &bundle.regs, 0),
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bi_get_src_new(bundle.fma, &bundle.regs, 1),
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bi_get_src_new(bundle.fma, &bundle.regs, 2),
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bi_get_src_new(bundle.fma, &bundle.regs, 3));
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uint64_t add = bi_pack_add((bi_instr *) bundle.add,
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bi_get_src_new((bi_instr *) bundle.add, &bundle.regs, sr_read + 0),
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bi_get_src_new((bi_instr *) bundle.add, &bundle.regs, sr_read + 1),
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bi_get_src_new((bi_instr *) bundle.add, &bundle.regs, sr_read + 2),
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uint64_t add = bi_pack_add(bundle.add,
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bi_get_src_new(bundle.add, &bundle.regs, sr_read + 0),
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bi_get_src_new(bundle.add, &bundle.regs, sr_read + 1),
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bi_get_src_new(bundle.add, &bundle.regs, sr_read + 2),
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0);
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if (bundle.add) {
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bi_instr *add = (bi_instr *) bundle.add;
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bi_instr *add = bundle.add;
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bool sr_write = bi_opcode_props[add->op].sr_write;
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@ -548,7 +548,7 @@ bi_pack_constants(bi_context *ctx, bi_clause *clause,
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/* Compute branch offset instead of a dummy 0 */
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if (branches) {
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bi_instr *br = (bi_instr *) clause->bundles[clause->bundle_count - 1].add;
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bi_instr *br = clause->bundles[clause->bundle_count - 1].add;
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assert(br && br->branch_target);
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/* Put it in the high place */
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@ -674,7 +674,7 @@ bi_collect_blend_ret_addr(bi_context *ctx, struct util_dynarray *emission,
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return;
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const bi_bundle *bundle = &clause->bundles[clause->bundle_count - 1];
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const bi_instr *ins = (bi_instr *) bundle->add;
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const bi_instr *ins = bundle->add;
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if (!ins || ins->op != BI_OPCODE_BLEND)
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return;
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@ -67,11 +67,11 @@ bi_print_slots(bi_registers *regs, FILE *fp)
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void
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bi_print_bundle(bi_bundle *bundle, FILE *fp)
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{
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bi_instruction *ins[2] = { bundle->fma, bundle->add };
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bi_instr *ins[2] = { bundle->fma, bundle->add };
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for (unsigned i = 0; i < 2; ++i) {
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if (ins[i])
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bi_print_instr((bi_instr *) ins[i], fp);
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bi_print_instr(ins[i], fp);
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else
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fprintf(fp, "nop\n");
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}
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@ -38,11 +38,10 @@ bi_compute_interference(bi_context *ctx, struct lcra_state *l)
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bi_block *blk = (bi_block *) _blk;
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uint16_t *live = mem_dup(_blk->live_out, l->node_count * sizeof(uint16_t));
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bi_foreach_instr_in_block_rev(blk, _ins) {
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bi_foreach_instr_in_block_rev(blk, ins) {
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/* Mark all registers live after the instruction as
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* interfering with the destination */
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bi_instr *ins = (bi_instr *) _ins;
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for (unsigned d = 0; d < ARRAY_SIZE(ins->dest); ++d) {
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if (bi_get_node(ins->dest[d]) >= l->node_count)
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continue;
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@ -83,8 +82,7 @@ bi_allocate_registers(bi_context *ctx, bool *success)
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l->class_size[BI_REG_CLASS_WORK] = 59 * 4;
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}
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bi_foreach_instr_global(ctx, _ins) {
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bi_instr *ins = (bi_instr *) _ins;
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bi_foreach_instr_global(ctx, ins) {
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unsigned dest = bi_get_node(ins->dest[0]);
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/* Blend shaders expect the src colour to be in r0-r3 */
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@ -147,8 +145,7 @@ bi_reg_from_index(struct lcra_state *l, bi_index index)
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static void
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bi_install_registers(bi_context *ctx, struct lcra_state *l)
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{
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bi_foreach_instr_global(ctx, _ins) {
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bi_instr *ins = (bi_instr *) _ins;
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bi_foreach_instr_global(ctx, ins) {
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ins->dest[0] = bi_reg_from_index(l, ins->dest[0]);
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bi_foreach_src(ins, s)
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@ -175,14 +172,13 @@ bi_rewrite_index_src_single(bi_instr *ins, bi_index old, bi_index new)
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* that bridge when we get to it. For now, just grab the one and only
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* instruction in the clause */
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static bi_instruction *
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static bi_instr *
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bi_unwrap_singleton(bi_clause *clause)
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{
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assert(clause->bundle_count == 1);
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assert((clause->bundles[0].fma != NULL) ^ (clause->bundles[0].add != NULL));
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return clause->bundles[0].fma ? clause->bundles[0].fma
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: clause->bundles[0].add;
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return clause->bundles[0].fma ?: clause->bundles[0].add;
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}
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/* If register allocation fails, find the best spill node */
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@ -192,8 +188,7 @@ bi_choose_spill_node(bi_context *ctx, struct lcra_state *l)
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{
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/* Pick a node satisfying bi_spill_register's preconditions */
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bi_foreach_instr_global(ctx, _ins) {
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bi_instr *ins = (bi_instr *) _ins;
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bi_foreach_instr_global(ctx, ins) {
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if (ins->no_spill || ins->dest[0].offset || !bi_is_null(ins->dest[1])) {
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for (unsigned d = 0; d < ARRAY_SIZE(ins->dest); ++d)
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lcra_set_node_spill_cost(l, bi_get_node(ins->dest[0]), -1);
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@ -247,7 +242,7 @@ bi_fill_src(bi_builder *b, bi_index index, uint32_t offset, bi_clause *clause,
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list_addtail(&singleton->link, &clause->link);
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/* Rewrite to use */
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bi_rewrite_index_src_single((bi_instr *) ins, index, temp);
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bi_rewrite_index_src_single(ins, index, temp);
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b->shader->fills++;
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}
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@ -267,7 +262,7 @@ bi_spill_register(bi_context *ctx, bi_index index, uint32_t offset)
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bi_foreach_block(ctx, _block) {
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bi_block *block = (bi_block *) _block;
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bi_foreach_clause_in_block_safe(block, clause) {
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bi_instr *ins = (bi_instr *) bi_unwrap_singleton(clause);
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bi_instr *ins = bi_unwrap_singleton(clause);
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if (bi_is_equiv(ins->dest[0], index)) {
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bi_spill_dest(&_b, index, offset, clause,
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block, ins, &channels);
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@ -88,9 +88,9 @@ bi_singleton(void *memctx, bi_instr *ins,
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assert(can_fma || can_add);
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if (can_add)
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u->bundles[0].add = (bi_instruction *) ins;
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u->bundles[0].add = ins;
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else
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u->bundles[0].fma = (bi_instruction *) ins;
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u->bundles[0].fma = ins;
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u->scoreboard_id = scoreboard_id;
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u->staging_barrier = osrb;
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@ -167,7 +167,7 @@ bi_schedule(bi_context *ctx)
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list_inithead(&bblock->clauses);
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bi_foreach_instr_in_block(bblock, ins) {
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bi_clause *u = bi_singleton(ctx, (bi_instr *) ins,
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bi_clause *u = bi_singleton(ctx, ins,
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bblock, 0, (1 << 0),
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!is_first);
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@ -712,8 +712,8 @@ typedef struct {
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typedef struct {
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uint8_t fau_idx;
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bi_registers regs;
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bi_instruction *fma;
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bi_instruction *add;
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bi_instr *fma;
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bi_instr *add;
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} bi_bundle;
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struct bi_block;
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@ -824,7 +824,7 @@ typedef struct {
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} bi_context;
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static inline void
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bi_remove_instruction(bi_instruction *ins)
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bi_remove_instruction(bi_instr *ins)
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{
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list_del(&ins->link);
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}
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@ -969,22 +969,22 @@ bi_node_to_index(unsigned node, unsigned node_count)
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list_for_each_entry_from_rev(pan_block, v, from, &ctx->blocks, link)
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#define bi_foreach_instr_in_block(block, v) \
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list_for_each_entry(bi_instruction, v, &(block)->base.instructions, link)
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list_for_each_entry(bi_instr, v, &(block)->base.instructions, link)
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#define bi_foreach_instr_in_block_rev(block, v) \
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list_for_each_entry_rev(bi_instruction, v, &(block)->base.instructions, link)
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list_for_each_entry_rev(bi_instr, v, &(block)->base.instructions, link)
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#define bi_foreach_instr_in_block_safe(block, v) \
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list_for_each_entry_safe(bi_instruction, v, &(block)->base.instructions, link)
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list_for_each_entry_safe(bi_instr, v, &(block)->base.instructions, link)
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#define bi_foreach_instr_in_block_safe_rev(block, v) \
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list_for_each_entry_safe_rev(bi_instruction, v, &(block)->base.instructions, link)
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list_for_each_entry_safe_rev(bi_instr, v, &(block)->base.instructions, link)
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#define bi_foreach_instr_in_block_from(block, v, from) \
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list_for_each_entry_from(bi_instruction, v, from, &(block)->base.instructions, link)
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list_for_each_entry_from(bi_instr, v, from, &(block)->base.instructions, link)
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#define bi_foreach_instr_in_block_from_rev(block, v, from) \
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list_for_each_entry_from_rev(bi_instruction, v, from, &(block)->base.instructions, link)
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list_for_each_entry_from_rev(bi_instr, v, from, &(block)->base.instructions, link)
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#define bi_foreach_clause_in_block(block, v) \
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list_for_each_entry(bi_clause, v, &(block)->clauses, link)
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@ -1020,16 +1020,16 @@ bi_node_to_index(unsigned node, unsigned node_count)
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#define bi_foreach_src(ins, v) \
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for (unsigned v = 0; v < ARRAY_SIZE(ins->src); ++v)
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static inline bi_instruction *
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bi_prev_op(bi_instruction *ins)
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static inline bi_instr *
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bi_prev_op(bi_instr *ins)
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{
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return list_last_entry(&(ins->link), bi_instruction, link);
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return list_last_entry(&(ins->link), bi_instr, link);
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}
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static inline bi_instruction *
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bi_next_op(bi_instruction *ins)
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static inline bi_instr *
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bi_next_op(bi_instr *ins)
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{
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return list_first_entry(&(ins->link), bi_instruction, link);
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return list_first_entry(&(ins->link), bi_instr, link);
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}
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static inline pan_block *
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