freedreno: a2xx: Implement DP2 instruction
Use DOT2ADDv instruction with 0.0f constant add. Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Rob Clark <robdclark@gmail.com>
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@ -987,6 +987,24 @@ translate_trig(struct fd2_compile_context *ctx,
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add_src_reg(ctx, instr, &tmp_src);
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}
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static void
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translate_dp2(struct fd2_compile_context *ctx,
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struct tgsi_full_instruction *inst,
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unsigned opc)
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{
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struct tgsi_src_register tmp_const;
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struct ir2_instruction *instr;
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/* DP2ADD c,a,b -> dot2(a,b) + c */
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/* for c we use the constant 0.0 */
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instr = ir2_instr_create_alu(next_exec_cf(ctx), DOT2ADDv, ~0);
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get_immediate(ctx, &tmp_const, fui(0.0f));
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add_dst_reg(ctx, instr, &inst->Dst[0].Register);
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add_src_reg(ctx, instr, &tmp_const);
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add_src_reg(ctx, instr, &inst->Src[0].Register);
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add_src_reg(ctx, instr, &inst->Src[1].Register);
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add_vector_clamp(inst, instr);
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}
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/*
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* Main part of compiler/translator:
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*/
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@ -1054,6 +1072,9 @@ translate_instruction(struct fd2_compile_context *ctx,
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instr = ir2_instr_create_alu(cf, ADDv, ~0);
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add_regs_vector_2(ctx, inst, instr);
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break;
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case TGSI_OPCODE_DP2:
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translate_dp2(ctx, inst, opc);
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break;
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case TGSI_OPCODE_DP3:
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instr = ir2_instr_create_alu(cf, DOT3v, ~0);
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add_regs_vector_2(ctx, inst, instr);
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