etnaviv: get addressing mode from tiling layout
Remove the "addressing_mode" state, which is currently set incorrectly, and instead deduce the addressing mode from the tiling layout. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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@ -204,8 +204,7 @@ static bool is_rs_align(struct etna_screen *screen,
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/* Create a new resource object, using the given template info */
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struct pipe_resource *
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etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
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enum etna_resource_addressing_mode mode, uint64_t modifier,
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const struct pipe_resource *templat)
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uint64_t modifier, const struct pipe_resource *templat)
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{
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struct etna_screen *screen = etna_screen(pscreen);
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struct etna_resource *rsc;
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@ -299,7 +298,6 @@ etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
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rsc->base.nr_samples = nr_samples;
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rsc->layout = layout;
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rsc->halign = halign;
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rsc->addressing_mode = mode;
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pipe_reference_init(&rsc->base.reference, 1);
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@ -340,13 +338,11 @@ etna_resource_create(struct pipe_screen *pscreen,
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{
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struct etna_screen *screen = etna_screen(pscreen);
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/* Figure out what tiling and address mode to use -- for now, assume that
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* texture cannot be linear. there is a capability LINEAR_TEXTURE_SUPPORT
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* (supported on gc880 and gc2000 at least), but not sure how it works.
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/* Figure out what tiling to use -- we always use tiled layouts,
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* except for scanout/dmabuf (which don't go through this path)
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* Buffers always have LINEAR layout.
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*/
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unsigned layout = ETNA_LAYOUT_LINEAR;
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enum etna_resource_addressing_mode mode = ETNA_ADDRESSING_MODE_TILED;
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if (etna_resource_sampler_only(templat)) {
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/* The buffer is only used for texturing, so create something
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@ -390,7 +386,7 @@ etna_resource_create(struct pipe_screen *pscreen,
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layout = ETNA_LAYOUT_LINEAR;
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/* modifier is only used for scanout surfaces, so safe to use LINEAR here */
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return etna_resource_alloc(pscreen, layout, mode, DRM_FORMAT_MOD_LINEAR, templat);
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return etna_resource_alloc(pscreen, layout, DRM_FORMAT_MOD_LINEAR, templat);
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}
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enum modifier_priority {
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@ -470,8 +466,7 @@ etna_resource_create_modifiers(struct pipe_screen *pscreen,
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*/
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tmpl.bind |= PIPE_BIND_SCANOUT;
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return etna_resource_alloc(pscreen, modifier_to_layout(modifier),
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ETNA_ADDRESSING_MODE_TILED, modifier, &tmpl);
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return etna_resource_alloc(pscreen, modifier_to_layout(modifier), modifier, &tmpl);
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}
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static void
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@ -550,8 +545,6 @@ etna_resource_from_handle(struct pipe_screen *pscreen,
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rsc->seqno = 1;
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rsc->layout = modifier_to_layout(handle->modifier);
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rsc->halign = TEXTURE_HALIGN_FOUR;
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rsc->addressing_mode = ETNA_ADDRESSING_MODE_TILED;
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level->width = tmpl->width0;
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level->height = tmpl->height0;
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@ -60,11 +60,6 @@ struct etna_resource_level {
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struct util_dynarray *patch_offsets;
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};
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enum etna_resource_addressing_mode {
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ETNA_ADDRESSING_MODE_TILED = 0,
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ETNA_ADDRESSING_MODE_LINEAR,
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};
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/* status of queued up but not flushed reads and write operations.
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* In _transfer_map() we need to know if queued up rendering needs
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* to be flushed to preserve the order of cpu and gpu access. */
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@ -82,7 +77,6 @@ struct etna_resource {
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/* only lod 0 used for non-texture buffers */
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/* Layout for surface (tiled, multitiled, split tiled, ...) */
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enum etna_surface_layout layout;
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enum etna_resource_addressing_mode addressing_mode;
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/* Horizontal alignment for texture unit (TEXTURE_HALIGN_*) */
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unsigned halign;
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struct etna_bo *bo; /* Surface video memory */
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@ -169,8 +163,7 @@ etna_screen_resource_alloc_ts(struct pipe_screen *pscreen,
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struct pipe_resource *
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etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
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enum etna_resource_addressing_mode mode, uint64_t modifier,
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const struct pipe_resource *templat);
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uint64_t modifier, const struct pipe_resource *templat);
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void
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etna_resource_screen_init(struct pipe_screen *pscreen);
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@ -224,7 +224,6 @@ etna_texture_handle_incompatible(struct pipe_context *pctx, struct pipe_resource
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PIPE_BIND_BLENDABLE);
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res->texture =
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etna_resource_alloc(pctx->screen, ETNA_LAYOUT_TILED,
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ETNA_ADDRESSING_MODE_TILED,
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DRM_FORMAT_MOD_LINEAR, &templat);
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}
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@ -161,7 +161,7 @@ etna_create_sampler_view_state(struct pipe_context *pctx, struct pipe_resource *
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break;
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}
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if (res->addressing_mode == ETNA_ADDRESSING_MODE_LINEAR) {
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if (res->layout == ETNA_LAYOUT_LINEAR && !util_format_is_compressed(so->format)) {
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sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_ADDRESSING_MODE(TEXTURE_ADDRESSING_MODE_LINEAR);
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for (int lod = 0; lod <= res->base.last_level; ++lod)
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@ -254,8 +254,7 @@ etna_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc,
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templ.bind = PIPE_BIND_RENDER_TARGET;
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trans->rsc = etna_resource_alloc(pctx->screen, ETNA_LAYOUT_LINEAR,
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ETNA_ADDRESSING_MODE_TILED, DRM_FORMAT_MOD_LINEAR,
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&templ);
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DRM_FORMAT_MOD_LINEAR, &templ);
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if (!trans->rsc) {
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slab_free(&ctx->transfer_pool, trans);
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return NULL;
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