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aco/tests: fix isel.sparse.clause for LLVM 12+ 

Seems disassembly of this instruction was fixed in LLVM 12.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Vinson Lee <vlee@freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4154
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9694>
This commit is contained in:
Rhys Perry 2021-03-18 19:14:24 +00:00 committed by Marge Bot
parent 837f76edb8
commit e76531ea7b
1 changed files with 15 additions and 4 deletions
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19
src/amd/compiler/tests/test_isel.cpp
View File

@ -24,6 +24,8 @@
#include "helpers.h"
#include "test_isel-spirv.h"
#include <llvm/Config/llvm-config.h>
using namespace aco;
BEGIN_TEST(isel.interp.simple)
@ -148,6 +150,13 @@ BEGIN_TEST(isel.sparse.clause)
uint code[4];
};
void main() {
//! llvm_version: #llvm_ver
//; if llvm_ver >= 12:
//; funcs['sample_res'] = lambda _: 'v[#_:#_]'
//; funcs['sample_coords'] = lambda _: '[v#_, v#_, v#_]'
//; else:
//; funcs['sample_res'] = lambda _: 'v#_'
//; funcs['sample_coords'] = lambda _: '[v#_, v#_, v#_, v#_]'
//>> v5: (noCSE)%zero0 = p_create_vector 0, 0, 0, 0, 0
//>> v5: %_ = image_sample_lz_o %_, %_, %zero0, %_, %_, %_ dmask:xyzw 2d tfe storage: semantics: scope:invocation
//>> v5: (noCSE)%zero1 = p_create_vector 0, 0, 0, 0, 0
@ -157,10 +166,10 @@ BEGIN_TEST(isel.sparse.clause)
//>> v5: (noCSE)%zero3 = p_create_vector 0, 0, 0, 0, 0
//>> v5: %_ = image_sample_lz_o %_, %_, %zero3, %_, %_, %_ dmask:xyzw 2d tfe storage: semantics: scope:invocation
//>> s_clause 0x3
//! image_sample_lz_o v#_, [v#_, v#_, v#_, v#_], @s256(img), @s128(samp) dmask:0xf dim:SQ_RSRC_IMG_2D tfe
//! image_sample_lz_o v#_, [v#_, v#_, v#_, v#_], @s256(img), @s128(samp) dmask:0xf dim:SQ_RSRC_IMG_2D tfe
//! image_sample_lz_o v#_, [v#_, v#_, v#_, v#_], @s256(img), @s128(samp) dmask:0xf dim:SQ_RSRC_IMG_2D tfe
//! image_sample_lz_o v#_, [v#_, v#_, v#_, v#_], @s256(img), @s128(samp) dmask:0xf dim:SQ_RSRC_IMG_2D tfe
//! image_sample_lz_o @sample_res, @sample_coords, @s256(img), @s128(samp) dmask:0xf dim:SQ_RSRC_IMG_2D tfe
//! image_sample_lz_o @sample_res, @sample_coords, @s256(img), @s128(samp) dmask:0xf dim:SQ_RSRC_IMG_2D tfe
//! image_sample_lz_o @sample_res, @sample_coords, @s256(img), @s128(samp) dmask:0xf dim:SQ_RSRC_IMG_2D tfe
//! image_sample_lz_o @sample_res, @sample_coords, @s256(img), @s128(samp) dmask:0xf dim:SQ_RSRC_IMG_2D tfe
code[0] = sparseTextureOffsetARB(tex, vec2(0.5), ivec2(1, 0), res[0]);
code[1] = sparseTextureOffsetARB(tex, vec2(0.5), ivec2(2, 0), res[1]);
code[2] = sparseTextureOffsetARB(tex, vec2(0.5), ivec2(3, 0), res[2]);
@ -168,6 +177,8 @@ BEGIN_TEST(isel.sparse.clause)
}
);
fprintf(output, "llvm_version: %u\n", LLVM_VERSION_MAJOR);
PipelineBuilder pbld(get_vk_device((chip_class)i));
pbld.add_cs(cs);
pbld.print_ir(VK_SHADER_STAGE_COMPUTE_BIT, "ACO IR", true);